PCI2050 datasheet(61/81 Pages) TI

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5–5

5.5

GPIO Output Data Register

The GPIO output data register controls the data driven on the GPIO terminals configured as outputs.

Bit

Name

GPIO output data

Type

R/W

Default

GPIO output data

Type:

Read/Write

Offset:

65h

Default:

00h

Table 5–5. GPIO Output Data Register

BIT

TYPE

FUNCTION

7–4

R/W

GPIO3–GPIO0 output high. Writing a 1 to any of these bits causes the corresponding GPIO signal to be driven high. Writing

a 0 has no effect. GPIO terminals programmed as inputs are not affected by these bits.

3–0

R/W

GPIO3–GPIO0 output low. Writing a 1 to any of these bits causes the corresponding GPIO signal to be driven low. Writing

a 0 has no effect. GPIO terminals programmed as inputs are not affected by these bits.

5.6

GPIO Output Enable Register

The GPIO output enable register controls the direction of the GPIO signal. By default all GPIO terminals are inputs.

Bit

Name

GPIO output enable

Type

R/W

Default

GPIO output enable

Type:

Read/Write

Offset:

66h

Default:

00h

Table 5–6. GPIO Output Enable Register

BIT

TYPE

FUNCTION

7–4

R/W

GPIO3–GPIO0 output enable. Writing a 1 to any of these bits causes the corresponding GPIO signal to be configured as

an output. Writing a 0 has no effect.

3–0

R/W

GPIO3–GPIO0 input enable. Writing a 1 to any of these bits causes the corresponding GPIO signal to be configured as an

input. Writing a 0 has no effect.

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