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PCI2050 bảng dữ liệu(PDF) 53 Page - Texas Instruments

tên linh kiện PCI2050
Giải thích chi tiết về linh kiện  PCI-TO-PCI BRIDGE
PDF  81 Pages
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nhà sản xuất  TI [Texas Instruments]
Trang chủ  http://www.ti.com
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PCI2050 bảng dữ liệu(HTML) 53 Page - Texas Instruments

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4–13
4.25 Prefetchable Limit Upper 32 Bits Register
The prefetchable LIMIT upper 32 bits register plus the prefetchable memory LIMIT register defines the base address
of the 64-bit prefetchable memory address range used by the bridge to determine when to forward memory
transactions from one interface to the other. The prefetchable LIMIT upper 32 bits register should be programmed
to all zeros when 32-bit addressing is being used.
Bit
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Name
Prefetchable limit upper 32 bits
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Default
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Name
Prefetchable limit upper 32 bits
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Default
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Register:
Prefetchable limit upper 32 bits
Type:
Read/Write
Offset:
2Ch
Default:
0000 0000h
4.26 I/O Base Upper 16 Bits Register
The I/O base upper 16 bits register specifies the upper 16 bits corresponding to AD31–AD16 of the 32-bit address
that specifies the base of the I/O range to forward from the primary PCI bus to the secondary PCI bus.
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Name
I/O base upper 16 bits
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Default
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Register:
I/O base upper 16 bits
Type:
Read/Write
Offset:
30h
Default:
0000h
4.27 I/O Limit Upper 16 Bits Register
The I/O limit upper 16-bits register specifies the upper 16 bits corresponding to AD31–AD16 of the 32-bit address
that specifies the upper limit of the I/O range to forward from the primary PCI bus to the secondary PCI bus.
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Name
I/O limit upper 16 bits
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Default
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Register:
I/O limit upper 16 bits
Type:
Read/Write
Offset:
32h
Default:
0000h



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