FXLS93421 datasheet(97/254 Pages) NXP

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NXP Semiconductors

FXLS9xxxx

Dual channel inertial sensor

RANGE[3]

RANGE[2]

RANGE[1]

RANGE[0]

Acceleration range

RESERVED

Table 176. Range indication bits (RANGE[3:0])...continued

11.2.36.2 Axis indication bits (AXIS[1:0])

The axis indication bits indicate the axes of sensitivity for the channel as shown in

Table 177.

AXIS[1]

AXIS[0]

Axis of sensitivity

RESERVED

Table 177. Axis indication bits (AXIS[1:0])

11.2.37 Self-test deflection storage registers

The self-test deflection registers are factory programmable OTP registers which contain

the nominal self-test values for the various self-tests at 25 °C. These registers are

included in the factory programmed OTP array error detection.

These registers are readable in DSI3 mode, SPI mode, I2C mode or PSI5 Programming

Mode when ENDINIT is not set. See Section 11.2.10 for details on the register read

process for these registers.

Location

Bit

Address

$A2

CH0_STL_P_L

CH0_STL_P[7:0]

$A3

CH0_STL_P_H

CH0_STL_P[15:8]

$A4

CH0_STH_P_L

CH0_STH_P[7:0]

$A5

CH0_STH_P_H

CH0_STH_P[15:8]

$A6

CH0_STL_N_L

CH0_STL_N[7:0]

$A7

CH0_STL_N_H

CH0_STL_N[15:8]

$A8

CH0_STH_N_L

CH0_STH_N[7:0]

$A9

CH0_STH_N_H

CH0_STH_N[15:8]

$B2

CH1_STL_P_L

CH1_STL_P[7:0]

$B3

CH1_STL_P_H

CH1_STL_P[15:8]

$B4

CH1_STH_P_L

CH1_STH_P[7:0]

$B5

CH1_STH_P_H

CH1_STH_P[15:8]

$B6

CH1_STL_N_L

CH1_STL_N[7:0]

$B7

CH1_STL_N_H

CH1_STL_N[15:8]

$B8

CH1_STH_N_L

CH1_STH_N[7:0]

$B9

CH1_STH_N_H

CH1_STH_N[15:8]

Table 178. Self-test deflection storage registers

The self-test values are positive and negative deflection values, measured at the factory,

and factory programmed for each device. The stored value is equal to one half of the

absolute value of the difference be tween the factory measured Chx-_SNSDATA0

FXLS9xxxx

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 6 — 8 February 2021

97 / 254

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