FXLS93421 datasheet(29/254 Pages) NXP

29 / 254 page

NXP Semiconductors

FXLS9xxxx

Dual channel inertial sensor

VBUS_I_L_min ≤ (VBUS_I – VSS) ≤ VBUS_I_H_max, TL ≤ TA ≤ TH, ΔT ≤ 25 °C/min, unless otherwise specified

Characteristic

Symbol

Min

Typ

Max

Units

Test

notes

10775

Sync Pulse Reference Discharge Start Time

tSYNC_LPF_RST_ST

—

9.0

—

µs

7, 9

10774

Sync Pulse Reference Discharge Activation Time

tSYNC_LPF_RST

—

154

—

µs

7, 9

10773

Sync Pulse Detection Disable Time (PDCM_CMD_B = 0)

tSYNC_OFF_500

—

450

—

µs

7, 8, 9

10772

Analog Delay of Sync Pulse Detection

tA_SYNC_DLY

—

600

7, 9

10771

Sync Pulse Pulldown Function Delay Time

tPD_DLY

—

9.0

—

µs

7, 9

10770

Sync Pulse Pulldown Function Activate Time

tPD_ON

—

µs

7, 8

10769

Sync Pulse Detection Jitter

tSYNC_JIT

—

0.5

µs

7, 8

10768

Data Transmission Single Bit Time (PSI5 Standard Bit Rate)

tBIT_Standard

—

8.00

—

µs

7, 8, 9

10767

Data Transmission Single Bit Time (PSI5 High Bit Rate)

tBIT_HI

—

5.30

—

µs

7, 8, 9

Response Current Transmission (No external Components)

10766

Response Slew Time: 20 % to 80 % of IR_PSI5

tSLEW1_RESP

350

400

500

1 ,7, 9

10765

Position of bit transition (All except 5.3 µs)

tBittrans_LowBaud

8, 9

10780

Position of bit transition (5.3 us)

tBittrans_HighBaud

⎯

8, 9

10764

Asynchronous Response Time

tASYNC

—

228

—

µs

7, 8, 9

Time Slots

10763

Min Programmed Time Slot: PDCM_RSPSTx < 0x0014

tTIMESLOTx_MIN

—

µs

7, 8, 9

10790

Max Programmed Time Slot: PDCM_RSPSTx = 0x1FFF

tTIMESLOTx_MAX

—

8191

—

µs

7, 8, 9

10789

Default Time Slot (PDCM_RSPSTx = 0x0000)

tTIMESLOT_DFLT

—

µs

7, 8, 9

10788

Time Slot Resolution

tTIMESLOTx_RES

—

1.0

—

µs/LSB 7, 8, 9

10787

Sync pulse to Daisy Chain Default Time Slot 0

tTIMESLOT_DC0

—

46.5

—

µs

7, 8, 9

10786

Sync pulse to Daisy Chain Default Time Slot 1 (Low)

tTIMESLOT_DC1_L

—

192

—

µs

7, 8, 9

10785

Sync pulse to Daisy Chain Default Time Slot 2 (Low)

tTIMESLOT_DC2_L

—

350

—

µs

7, 8, 9

10784

Sync pulse to Daisy Chain Default Time Slot 1 (High)

tTIMESLOT_DC1_H

—

150

—

µs

7, 8, 9

10783

Sync pulse to Daisy Chain Default Time Slot 2 (High)

tTIMESLOT_DC2_H

—

260

—

µs

7, 8, 9

10782

Sync pulse to Daisy Chain Default Time Slot 3 (High)

tTIMESLOT_DC3_H

—

380

—

µs

7, 8, 9

10781

Sync pulse to Daisy Chain Programming Time Slot

tTIMESLOT_DCP

—

46.5

—

µs

7, 8, 9

10762

PSI5 Data Latency

tLAT_PSI5

—

1.00

µs

7, 8

Bus Switch Output Activation Time (C = 50 pF)

10761

From last bit of "SetAdr" Response to 80 % of VBUS_SW_OH

tBUS_SW

⎯

300

µs

PSI5 Programming Mode Sync Pulse Period

10760

The user must provide a sync pulse period within this range to

guarantee Programming Mode communications

tS-S_PM

245

250

255

µs

7, 8, 9

PSI5 Programming Mode Command Blanking Time

tSYNC_OFF_250

—

200

—

µs

7, 8, 9

Daisy Chain Mode Sync Pulse Period

39810

The user must provide a sync pulse period within this range to

guarantee communications

tS-S_DC

490

500

510

µs

7, 8, 9

OTP Program Timing

10793

Time to program one OTP User Region

tOTP_WRITE_MAX

—

7, 8, 9

Table 35. Dynamic electrical characteristics - PSI5...continued

FXLS9xxxx

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 6 — 8 February 2021

29 / 254

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