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FXLS93421 bảng dữ liệu(PDF) 89 Page - NXP Semiconductors |
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FXLS93421 bảng dữ liệu(HTML) 89 Page - NXP Semiconductors |
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89 / 254 page ![]() NXP Semiconductors FXLS9xxxx Dual channel inertial sensor OC_LIMIT[2:0] Post PSI5 self-test offset limits 0x0 The post PSI5 self-test offset test is disabled. 0x1 ± 2 LSB, 10-bit 0x2 ± 4 LSB, 10-bit 0x3 ± 6 LSB, 10-bit 0x4 ± 8 LSB, 10-bit 0x5 ± 10 LSB, 10-bit 0x6 ± 12 LSB, 10-bit 0x7 ± 14 LSB, 10-bit Table 154. Offset cancellation test limit bits (OC_LIMIT[2:0]) 11.2.27.3 DSP disable bit (DSP_DIS) The DSP disable bit provides the option for the user to disable the clocking to the DSP if sensor data from the associated channel is not used. DSP_DIS DSP status 0 DSP operational as specified 1 DSP clocking disabled. Sensor data is readable but will not be updated by the DSP even when self-test is enabled Table 155. DSP disable bit (DSP_DIS) Care must be taken to ensure the DSP is not disabled for sources that are enabled. 11.2.28 Channel 0 and Channel 1 arming configuration registers (CH0_ARM_CFG, CH1_ARM_CFG) The arming configuration registers contain configuration information for the arming function. The values in these registers are only relevant if the arming function is operating in moving average mode, or count mode. Note: The arming function is reset on a change to the CHx_ARM_CFG bits. This includes the downsampling state and all history registers. These registers can be written during initialization but are locked once the ENDINIT bit is set. Refer to Section 11.2.6. The registers are included in the read/write array error detection. Location Bit Address Register 7 6 5 4 3 2 1 0 $45 CH0_ARM_CFG ARM_DS[1:0] ARM_PS[1:0] ARM_WS_N[1:0] ARM_WS_P[1:0] $4D CH1_ARM_CFG ARM_DS[1:0] ARM_PS[1:0] ARM_WS_N[1:0] ARM_WS_P[1:0] Unprogrammed OTP Value 0 0 0 0 0 0 0 0 Table 156. Channel 0 and Channel 1 arming configuration registers (CH0_ARM_CFG, CH1_ARM_CFG) 11.2.28.1 Arming function down sampling selection bits (ARM_DS[1:0]) The arming function down sampling selection bits select the down sample rate for the arming function. See Section 11.9.4. FXLS9xxxx All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 6 — 8 February 2021 89 / 254 |
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