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74 / 254 page  NXP Semiconductors FXLS9xxxx Dual channel inertial sensor Location Bit Address Register 7 6 5 4 3 2 1 0 FXLS93xxx Unprogrammed Default PSI5 Mode 0 0 0 0 0 0 0 0 $2C PDCM_ RSPST3_L PDCM_RSPST3[7:0] Unprogrammed OTP Value 0 0 0 0 0 0 0 0 FXLS93xxx Unprogrammed Default PSI5 Mode 0 0 0 0 0 0 0 0 $2D PDCM_ RSPST3_H BRC_RSP3[1:0] RESERVED PDCM_RSPST3[12:8] Unprogrammed OTP Value 0 0 0 0 0 0 0 0 FXLS93xxx Unprogrammed Default PSI5 Mode 0 0 0 0 0 0 0 0 Table 121. DSI3 and PSI5 start time registers (PDCM_RSPSTx_x)...continued 11.2.18.1 Periodic data collection mode response start time (PDCM_RSPSTx[12:0]) The periodic data collection mode response start time registers set the DSI3 periodic data collection mode or PSI5 synchronous mode response start time for the associated data and SOURCEID. The value is stored in 1.0 µs increments. PDCM_RSPSTx[12:0] Periodic data collection mode response start time 0 See Table 123 0 < PDCM_RSPSTx[12:0] < 20 20.0 µs 20 < PDCM_RSPSTx[12:0] PDCM response start = PDCM_RSPST x 1.0 µs Table 122. Periodic data collection mode response start time (PDCM_RSPSTx[12:0]) Table 123 shows the relationship of the SOURCEID, the transmitted data, the response start times, and the default states for each set of registers in DSI3 periodic data collection mode. Care must be taken to prevent from programming response start times which cause data contention in the system. SOURCEID register Transmitted data Start time registers Default start (PDCM_RSPSTx[12:0] = 0x00) SOURCEID_0 CH0_SNSDATA0 PDCM_RSPST0[12:0] Transmit Data with a start time of 20 µs SOURCEID_1 CH0_SNSDATA1 PDCM_RSPST1[12:0] Transmit Data with a start time of 20 µs SOURCEID_2 CH1_SNSDATA0 PDCM_RSPST2[12:0] Transmit Data with a start time of 20 µs SOURCEID_3 CH1_SNSDATA1 PDCM_RSPST3[12:0] Transmit Data with a start time of 20 µs Table 123. Synchronous mode: Source ID response start time Table 124 shows the PSI5 data transmission start times based on the values in the PDCM_RSPSTx registers and the value of the ASYNC bit. Care must be taken to prevent from programming time slots which violate the PSI5 Version 1.3 specification, or time slots which will cause data contention. ASYNC bit SOURCEID register Transmitted data Time slot start time Default start (PDCM_ RSPSTx[12:0] = 0x00) 1 SOURCEID_0 CH0_SNSDATA0 Asynchronous Mode tASYNC Table 124. Asynchronous mode: Source ID response start time FXLS9xxxx All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 6 — 8 February 2021 74 / 254 |
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