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FXLS93421 bảng dữ liệu(PDF) 23 Page - NXP Semiconductors

tên linh kiện FXLS93421
Giải thích chi tiết về linh kiện  Dual channel inertial sensor
PDF  254 Pages
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nhà sản xuất  NXP [NXP Semiconductors]
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FXLS93421 bảng dữ liệu(HTML) 23 Page - NXP Semiconductors

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NXP Semiconductors
FXLS9xxxx
Dual channel inertial sensor
User range (g)
Offset (LSB, 12 bit)
62
± 41
62.5
± 41
75
± 34
85.3
± 30
100
± 25
105
± 24
112.5
± 23
125
± 21
128
± 20
150
± 17
Table 25. Medium g, SPI/DSI3 12-bit offset specification...continued
Table 26 lists the offset before offset cancellation limits for some PSI5 10-bit user gain
settings.
User range (g)
Offset (LSB, 10 bit)
15
± 40
20
± 30
30
± 20
60
± 10
120
± 5
Table 26. Medium g, PSI5 10-bit offset specification
The signal noise scales with the user gain and with signal bandwidth. The higher the
gain (lower range), the higher the noise, the wider the bandwidth, the higher the noise.
Table 27 lists the adjusted specification limits for some user gain settings and low-pass
filter selections.
Note: Peak values indicate the maximum deviation from the mean.
LPF 400 Hz, 4p
LPF 400 Hz, 3p
LPF 180 Hz, 2p
LPF 325 Hz, 3p
LPF 1500 Hz, 4p
LPF 800 Hz, 4p
User range
(g)
Peak
LSB 12 bit
RMS
LSB 12 bit
Peak
LSB 12 bit
RMS
LSB 12 bit
Peak
LSB 12 bit
RMS
LSB 12 bit
Peak
LSB 12 bit
RMS
LSB 12 bit
Peak
LSB 12 bit
RMS
LSB 12 bit
Peak
LSB 12 bit
RMS
LSB 12 bit
15.5
14
4
14
4
10
3
13
4
26
7
20
5
25
9
3
9
3
6
2
8
2
17
4
12
3
50
4
1
5
1
3
1
4
1
8
2
6
2
62.5
4
1
4
1
3
1
4
1
7
2
5
2
100
3
1
3
1
2
1
2
1
4
1
3
1
125
2
1
2
1
2
1
2
1
4
1
3
1
150
2
1
2
1
1
1
2
1
3
1
2
1
Table 27. Lateral, Medium g, SPI/DSI3 12-bit noise specification
FXLS9xxxx
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2021. All rights reserved.
Product data sheet
Rev. 6 — 8 February 2021
23 / 254



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