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FXLS93421 bảng dữ liệu(PDF) 86 Page - NXP Semiconductors |
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FXLS93421 bảng dữ liệu(HTML) 86 Page - NXP Semiconductors |
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86 / 254 page ![]() NXP Semiconductors FXLS9xxxx Dual channel inertial sensor 11.2.26.2 Signal inversion bit (INVERT) The signal inversion bit provides the option to invert the polarity of the sensor signals as shown in Table 149. INVERT Acceleration sensor data Fixed pattern self-test Digital self-test Analog self-test Temperature Positive Self-Test: Delta from Offset as specified in Section 10 0 As shown in Section 8. Digital Self-Test Activation results in the values specified in Section 10.8. Negative Self-Test: Delta from Offset inverted from the specified values in Section 10.8 (Negative Values) Positive Self-Test: Delta from Offset inverted from the specified values in Section 10.8 (Negative Values) 1 Inverted polarity from that shown in Section 8 As specified in Section 11.2.27.1 Digital Self- Test Activation results in the two's complement of the values specified in Section 10.8. Negative Self-Test: Delta from Offset as specified in Section 10 As specified in Section 11.7.2 Table 149. Signal inversion bit (INVERT) 11.2.26.3 Offset cancellation filter selection bits (OC_FILT[1:0]) The offset cancellation filter selection bits provide the option to bypass the offset cancellation filter and the rate limiting for the associated channel. See Section 11.6.4.6 for details regarding offset cancellation. OC_FILT[1] OC_FILT[0] Offset cancellation IIR filter Offset cancellation rate limiting 0 0 0.04 Hz Enabled 0 1 0.04 Hz Bypassed 1 0 0.005 Hz Bypassed 1 1 Bypassed Bypassed Table 150. Offset cancellation filter selection bits (OC_FILT[1:0]) 11.2.26.4 Arming pin configuration bits (ARM_CFG[2:0]) and PCM range selection bit (PCM) The ARM configuration bits (ARM_CFG[2:0]) select the mode of operation for the arming pins. ARM_ CFG[2] ARM_ CFG[1] ARM_ CFG[0] PCM Operating mode Output type Reference 0 0 0 x Arm/PCM Output Disabled High Impedance 0 0 1 0 Arm/PCM Output Disabled Driven Low 0 0 1 1 PCM Output Digital Output Section 11.8 0 1 0 x Moving Average Mode Open-Drain, Active High with Pull-down Current Section 11.9.1 Table 151. Arming pin configuration bits (ARM_CFG[2:0]) and PCM range selection bit (PCM) FXLS9xxxx All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 6 — 8 February 2021 86 / 254 |
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