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FXLS93421 bảng dữ liệu(PDF) 40 Page - NXP Semiconductors |
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FXLS93421 bảng dữ liệu(HTML) 40 Page - NXP Semiconductors |
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40 / 254 page  NXP Semiconductors FXLS9xxxx Dual channel inertial sensor Bit Type[1] Address Register 7 6 5 4 3 2 1 0 UF2 $3A - $3C RESERVED RESERVED UF2 $3D SPI_CFG SPI_STATUS DATASIZE SPI_CRC_LEN[1:0] SPICRCSEED[3:0] UF2 $3E WHO_AM_I WHO_AM_I[7:0] UF2 $3F I2C_ADDRESS I2C_ADDRESS[7:0] Table 45. User accessible data - communication information...continued [1] Memory Type Codes R - Readable Register with No OTP F – User Readable Register with OTP UF0 – One Time User Programmable OTP Location Region 0 UF1 – One Time User Programmable OTP Location Region 1 UF2 – One Time User Programmable OTP Location Region 2 R/W – User Writable Register 11.1.3 User accessible data - sensor specific information Bit Type[1] Address Register 7 6 5 4 3 2 1 0 UF2 $40 CH0_CFG_U1 LPF[3:0] SAMPLERATE[1:0] USER_SNS_SHIFT[1:0] UF2 $41 CH0_CFG_U2 U_SNS_MULT[7:0] UF2 $42 CH0_CFG_U3 UNSIGN EDDATA DATATYPE0[1:0] DATATYPE1[2:0] MOVEAVG[1:0] UF2 $43 CH0_CFG_U4 RESET_OC INVERT OC_FILT[1:0] PCM ARM_CFG[2:0] UF2 $44 CH0_CFG_U5 ST_CTRL[3:0] OC_LIMIT[2:0] DSP_DIS UF2 $45 CH0_ARM_ CFG ARM_DS[1:0] ARM_PS[1:0] ARM_WS_N[1:0] ARM_WS_P[1:0] UF2 $46 CH0_ARM_T_P ARM_T_P[7:0] UF2 $47 CH0_ARM_T_N ARM_T_N[7:0] UF2 $48 CH1_CFG_U1 LPF[3:0] SAMPLERATE[1:0] USER_SNS_SHIFT[1:0] UF2 $49 CH1_CFG_U2 U_SNS_MULT[7:0] UF2 $4A CH1_CFG_U3 UNSIGN EDDATA DATATYPE0[1:0] DATATYPE1[2:0] MOVEAVG[1:0] UF2 $4B CH1_CFG_U4 RESET_OC INVERT OC_FILT[1:0] PCM ARM_CFG[2:0] UF2 $4C CH1_CFG_U5 ST_CTRL[3:0] OC_LIMIT[2:0] DSP_DIS UF2 $4D CH1_ARM_ CFG ARM_DS[1:0] ARM_PS[1:0] ARM_WS_N[1:0] ARM_WS_P[1:0] UF2 $4E CH1_ARM_T_P ARM_T_P[7:0] UF2 $4F CH1_ARM_T_N ARM_T_N[7:0] UF2 $50 OC_PHASE_ CFG CH0_OCFINAL CH1_OCFINAL RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED UF2 $51-$54 RESERVED RESERVED UF2 $55 CH0_U_ OFFSET_L CH0_U_OFFSET[7:0] UF2 $56 CH0_U_ OFFSET_H CH0_U_OFFSET[15:8] UF2 $57-$5C RESERVED RESERVED UF2 $5D CH1_U_ OFFSET_L CH1_U_OFFSET[7:0] UF2 $5E CH1_U_ OFFSET_H CH1_U_OFFSET[15:8] F $5F CRC_UF2 LOCK_UF2 0 0 0 CRC_UF2[3:0] R $60 CH0_STAT SIGNALCLIP OCPHASE[2:0] ST_INCMPLT ST_ACTIVE OFFSET_ERR ST_ERROR R $61 DEVSTAT_ COPY CH0_ERR CH1_ERR COMM_ERR MEMTEMP_ ERR SUPPLY_ERR TESTMODE DEVRES DEVINIT R $62 CH0_ SNSDATA0_L CH0_SNSDATA0[7:0] Table 46. User accessible data - sensor specific information FXLS9xxxx All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 6 — 8 February 2021 40 / 254 |
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