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FXLS93421 bảng dữ liệu(PDF) 73 Page - NXP Semiconductors

tên linh kiện FXLS93421
Giải thích chi tiết về linh kiện  Dual channel inertial sensor
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NXP Semiconductors
FXLS9xxxx
Dual channel inertial sensor
In SPI and I2C mode, the INIT2_EXT bit is readable and writable, but has no impact on
device operation or performance.
11.2.17.8 Asynchronous mode bit (ASYNC)
In PSI5 mode, the asynchronous mode bit enables asynchronous data transmission as
described in Section 11.2.18.1 only if the DAISY_CHAIN bit is not set.
In DSI3 mode, the ASYNC bit is readable and writable, but has no impact on device
operation or performance.
In SPI and I2C mode, the ASYNC bit is readable and writable, but has no impact on
device operation or performance.
11.2.18 DSI3 and PSI5 start time registers (PDCM_RSPSTx_x)
The DSI3 and PSI5 start time registers are user programmed read/write registers which
contain user-specific configuration information for DSI3 periodic data collection mode
and PSI5 synchronous mode. These registers are included in the read/write array error
detection.
These registers are readable and writable in DSI3 mode, SPI mode, I2C mode or PSI5
Programming Mode.
Location
Bit
Address
Register
7
6
5
4
3
2
1
0
$26
PDCM_
RSPST0_L
PDCM_RSPST0[7:0]
Unprogrammed OTP Value
0
0
0
0
0
0
0
0
FXLS93xxx
Unprogrammed
Default PSI5 Mode
0
0
1
0
1
1
1
1
$27
PDCM_
RSPST0_H
BRC_RSP0[1:0]
RESERVED
PDCM_RSPST0[12:8]
Unprogrammed OTP Value
0
0
0
0
0
0
0
0
FXLS93xxx
Unprogrammed
Default PSI5 Mode
0
0
0
0
0
0
0
0
$28
PDCM_
RSPST1_L
PDCM_RSPST1[7:0]
Unprogrammed OTP Value
0
0
0
0
0
0
0
0
FXLS93xxx
Unprogrammed
Default PSI5 Mode
0
0
0
0
0
0
0
0
$29
PDCM_
RSPST1_H
BRC_RSP1[1:0]
RESERVED
PDCM_RSPST1[12:8]
Unprogrammed OTP Value
0
0
0
0
0
0
0
0
FXLS93xxx
Unprogrammed
Default PSI5 Mode
0
0
0
0
0
0
0
0
$2A
PDCM_
RSPST2_L
PDCM_RSPST2[7:0]
Unprogrammed OTP Value
0
0
0
0
0
0
0
0
FXLS93xxx
Unprogrammed
Default PSI5 Mode
1
1
1
1
0
1
0
0
$2B
PDCM_
RSPST2_H
BRC_RSP2[1:0]
RESERVED
PDCM_RSPST2[12:8]
Unprogrammed OTP Value
0
0
0
0
0
0
0
0
Table 121. DSI3 and PSI5 start time registers (PDCM_RSPSTx_x)
FXLS9xxxx
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2021. All rights reserved.
Product data sheet
Rev. 6 — 8 February 2021
73 / 254



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