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HCS08 bảng dữ liệu(PDF) 302 Page - NXP Semiconductors |
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HCS08 bảng dữ liệu(HTML) 302 Page - NXP Semiconductors |
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302 / 374 page ![]() Universal Serial Bus Device Controller (S08USBV1) MC9S08JM60 Series Data Sheet, Rev. 5 302 Freescale Semiconductor 17.3.6 Interrupt Enable Register (INTENB) The INTENB contains enabling bits for each of the interrupt sources within the USB module. Setting any of these bits will enable the respective interrupt source in the INTSTAT register. This register will contain the value of 0x00 after a reset, i.e. all interrupts disabled. 1 ERRORF Error Flag — This bit is set when any of the error conditions within the ERRSTAT register has occurred. The firmware must then read the ERRSTAT register to determine the source of the error. 0 No error conditions within the ERRSTAT register have been detected 1 Error conditions within the ERRSTAT register have been detected 0 USBRSTF USB Reset Flag —This bit is set when the USB module has decoded a valid USB reset. When asserted, this bit will inform the MCU to automatically write 0x00 to the address register and to enable endpoint 0. USBRSTF is set once a USB reset has been detected for 2.5 μs. It will not be asserted again until the USB reset condition has been removed, and then reasserted. 0 No USB reset observed 1 USB reset detected 76 54 321 0 R STALL 0 RESUME SLEEP TOKDNE SOFTOK ERROR USBRST W Reset 0 00 000 00 Figure 17-9. Interrupt Enable Register (INTENB) Table 17-10. INTENB Field Descriptions Field Description 7 STALL STALL Interrupt Enable — Setting this bit will enable STALL interrupts. 0 Interrupt disabled 1 Interrupt enabled 5 RESUME RESUME Interrupt Enable — Setting this bit will enable RESUME interrupts. 0 Interrupt disabled 1 Interrupt enabled 4 SLEEP SLEEP Interrupt Enable — Setting this bit will enable SLEEP interrupts. 0 Interrupt disabled 1 Interrupt enabled 3 TOKDNE TOKDNE Interrupt Enable — Setting this bit will enable TOKDNE interrupts. 0 Interrupt disabled 1 Interrupt enabled 2 SOFTOK SOFTOK Interrupt Enable — Setting this bit will enable SOFTOK interrupts. 0 Interrupt disabled 1 Interrupt enabled Table 17-9. INTSTAT Field Descriptions (continued) Field Description |
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