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HCS08 bảng dữ liệu(PDF) 48 Page - NXP Semiconductors |
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HCS08 bảng dữ liệu(HTML) 48 Page - NXP Semiconductors |
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48 / 374 page ![]() Chapter 4 Memory MC9S08JM60 Series Data Sheet, Rev. 5 48 Freescale Semiconductor High-page registers, shown in Table 4-3, are accessed much less often than other I/O and control registers so they have been located outside the direct addressable memory space, starting at 0x1800. 0x00 89 IDCOMP 1 1 NID5 NID4 NID3 NID2 NID1 NID0 0x00 8A REV REV7 REV6 REV5 REV4 REV3 REV2 REV1 REV0 0x00 8B– 0x00 8F Reserved — — — — — — — — 0x00 90 INTSTAT STALLF — RESUMEF SLEEPF TOKDNEF SOFTOKF ERRORF USBRSTF 0x00 91 INTENB STALL —RESUME SLEEP TOKDNE SOFTOK ERROR USBRST 0x00 92 ERRSTAT BTSERRF — BUFERRF BTOERRF DFN8F CRC16F CRC5F PIDERRF 0x00 93 ERRENB BTSERR — BUFERR BTOERR DFN8 CRC16 CRC5 PIDERR 0x00 94 STAT ENDP IN ODD 0 0 0x00 95 CTL — — TSUSPEND — — CRESUME ODDRST USBEN 0x00 96 ADDR — ADDR6 ADDR5 ADDR4 ADDR3 ADDR2 ADDR1 ADDR0 0x00 97 FRMNUML FRM7 FRM6 FRM5 FRM4 FRM3 FRM2 FRM1 FRM0 0x00 98 FRMNUMH 0 0 0 0 0 FRM10 FRM9 FRM8 0x00 99– 0x00 9C Reserved — — — — — — — — 0x00 9D EPCTL0 — — 0 EPCTLDIS EPRXEN EPTXEN EPSTALL EPHSHK 0x00 9E EPCTL1 — — 0 EPCTLDIS EPRXEN EPTXEN EPSTALL EPHSHK 0x00 9F EPCTL2 — — 0 EPCTLDIS EPRXEN EPTXEN EPSTALL EPHSHK 0x00 A0 EPCTL3 — — 0 EPCTLDIS EPRXEN EPTXEN EPSTALL EPHSHK 0x00 A1 EPCTL4 — — 0 EPCTLDIS EPRXEN EPTXEN EPSTALL EPHSHK 0x00 A2 EPCTL5 — — 0 EPCTLDIS EPRXEN EPTXEN EPSTALL EPHSHK 0x00 A3 EPCTL6 — — 0 EPCTLDIS EPRXEN EPTXEN EPSTALL EPHSHK 0x00 A4– 0x00 AF Reserved — — — — — — — — Table 4-3. High-Page Register Summary (Sheet 1 of 3) Address Register Name Bit 7 6 5 4 3 2 1 Bit 0 0x1800 SRS POR PIN COP ILOP 0LOC LVD — 0x1801 SBDFR 0 0 0 0 0 0 0BDFR 0x1802 SOPT1 COPT STOPE — 0 0 — — 0x1803 SOPT2 COPCLKS COPW 0 0 0 SPI1FE SPI2FE ACIC 0x1804– 0x1805 Reserved — — — — — — — — 0x1806 SDIDH — — — — ID11 ID10 ID9 ID8 0x1807 SDIDL ID7 ID6 ID5 ID4 ID3 ID2 ID1 ID0 0x1808 Reserved — — — — — — — — 0x1809 SPMSC1 LVWF LVWACK LVWIE LVDRE LVDSE LVDE 01 BGBE 0x180A SPMSC2 — — LVDV LVWV PPDF PPDACK — PPDC 0x180B– 0x180F Reserved — — — — — — — — Table 4-2. Direct-Page Register Summary (Sheet 4 of 4) Address Register Name Bit 7 6 5 4 3 2 1 Bit 0 |
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