HCS08 datasheet(13/374 Pages) NXP

13 / 374 page

MC9S08JM60 Series Data Sheet, Rev. 5

Freescale Semiconductor

10.3.2 Status and Control Register 2 (ADCSC2) ......................................................................141

10.3.3 Data Result High Register (ADCRH) .............................................................................141

10.3.4 Data Result Low Register (ADCRL) ..............................................................................142

10.3.5 Compare Value High Register (ADCCVH) ....................................................................142

10.3.6 Compare Value Low Register (ADCCVL) .....................................................................143

10.3.7 Configuration Register (ADCCFG) ................................................................................143

10.3.8 Pin Control 1 Register (APCTL1) ..................................................................................144

10.3.9 Pin Control 2 Register (APCTL2) ..................................................................................145

10.3.10Pin Control 3 Register (APCTL3) ..................................................................................146

10.4 Functional Description ..................................................................................................................147

10.4.1 Clock Select and Divide Control ....................................................................................148

10.4.2 Input Select and Pin Control ...........................................................................................148

10.4.3 Hardware Trigger ............................................................................................................148

10.4.4 Conversion Control .........................................................................................................148

10.4.5 Automatic Compare Function .........................................................................................151

10.4.6 MCU Wait Mode Operation ............................................................................................151

10.4.7 MCU Stop3 Mode Operation ..........................................................................................152

10.4.8 MCU Stop2 Mode Operation ..........................................................................................152

10.5 Initialization Information ..............................................................................................................152

10.5.1 ADC Module Initialization Example .............................................................................153

10.6 Application Information ................................................................................................................154

10.6.1 External Pins and Routing ..............................................................................................154

10.6.2 Sources of Error ..............................................................................................................156

Chapter 11

Inter-Integrated Circuit (S08IICV2)

11.1 Introduction ...................................................................................................................................159

11.1.1 Features ...........................................................................................................................161

11.1.2 Modes of Operation ........................................................................................................161

11.1.3 Block Diagram ................................................................................................................161

11.2 External Signal Description ..........................................................................................................162

11.2.1 SCL — Serial Clock Line ...............................................................................................162

11.2.2 SDA — Serial Data Line ................................................................................................162

11.3 Register Definition ........................................................................................................................162

11.3.1 IIC Address Register (IICA) ...........................................................................................163

11.3.2 IIC Frequency Divider Register (IICF) ..........................................................................163

11.3.3 IIC Control Register (IICC1) ..........................................................................................166

11.3.4 IIC Status Register (IICS) ...............................................................................................166

11.3.5 IIC Data I/O Register (IICD) ..........................................................................................167

11.3.6 IIC Control Register 2 (IICC2) .......................................................................................168

11.4 Functional Description ..................................................................................................................169

11.4.1 IIC Protocol .....................................................................................................................169

11.4.2 10-bit Address .................................................................................................................172

11.4.3 General Call Address ......................................................................................................173

11.5 Resets ............................................................................................................................................173

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