HCS08 datasheet(15/374 Pages) NXP

15 / 374 page

MC9S08JM60 Series Data Sheet, Rev. 5

Freescale Semiconductor

Chapter 14

Serial Communications Interface (S08SCIV4)

14.1 Introduction ...................................................................................................................................221

14.1.1 Features ...........................................................................................................................223

14.1.2 Modes of Operation ........................................................................................................223

14.1.3 Block Diagram ................................................................................................................224

14.2 Register Definition ........................................................................................................................226

14.2.1 SCI Baud Rate Registers (SCIxBDH, SCIxBDL) ..........................................................226

14.2.2 SCI Control Register 1 (SCIxC1) ...................................................................................227

14.2.3 SCI Control Register 2 (SCIxC2) ...................................................................................228

14.2.4 SCI Status Register 1 (SCIxS1) ......................................................................................229

14.2.5 SCI Status Register 2 (SCIxS2) ......................................................................................231

14.2.6 SCI Control Register 3 (SCIxC3) ...................................................................................232

14.2.7 SCI Data Register (SCIxD) .............................................................................................233

14.3 Functional Description ..................................................................................................................233

14.3.1 Baud Rate Generation .....................................................................................................233

14.3.2 Transmitter Functional Description ................................................................................234

14.3.3 Receiver Functional Description ....................................................................................235

14.3.4 Interrupts and Status Flags ..............................................................................................237

14.3.5 Additional SCI Functions ...............................................................................................238

Chapter 15

16-Bit Serial Peripheral Interface (S08SPI16V1)

15.1 Introduction ...................................................................................................................................241

15.1.1 SPI Port Configuration Information ...............................................................................241

15.1.2 Features ...........................................................................................................................244

15.1.3 Modes of Operation ........................................................................................................244

15.1.4 Block Diagrams ..............................................................................................................244

15.2 External Signal Description ..........................................................................................................246

15.2.1 SPSCK — SPI Serial Clock ............................................................................................246

15.2.2 MOSI — Master Data Out, Slave Data In ......................................................................247

15.2.3 MISO — Master Data In, Slave Data Out ......................................................................247

15.2.4 SS — Slave Select ..........................................................................................................247

15.3 Register Definition ........................................................................................................................247

15.3.1 SPI Control Register 1 (SPIxC1) ....................................................................................247

15.3.2 SPI Control Register 2 (SPIxC2) ....................................................................................248

15.3.3 SPI Baud Rate Register (SPIxBR) ..................................................................................250

15.3.4 SPI Status Register (SPIxS) ............................................................................................251

15.3.5 SPI Data Registers (SPIxDH:SPIxDL) ...........................................................................252

15.3.6 SPI Match Registers (SPIxMH:SPIxML) .......................................................................253

15.4 Functional Description ..................................................................................................................254

15.4.1 General ............................................................................................................................254

15.4.2 Master Mode ...................................................................................................................254

15.4.3 Slave Mode .....................................................................................................................255

15.4.4 Data Transmission Length ..............................................................................................256

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