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HCS08 bảng dữ liệu(PDF) 23 Page - NXP Semiconductors |
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HCS08 bảng dữ liệu(HTML) 23 Page - NXP Semiconductors |
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23 / 374 page ![]() Chapter 1 Device Overview MC9S08JM60 Series Data Sheet, Rev. 5 Freescale Semiconductor 23 “Analog-to-Digital Converter (S08ADC12V1),” for more information regarding the use of MCGERCLK with these modules. • MCGFFCLK — This clock source is divided by 2 to generate FFCLK after being synchronized to the BUSCLK. It can be selected as clock source for the TPM modules. The frequency of the MCGFFCLK is determined by the settings of the MCG. See the Section 12.4.7, “Fixed Frequency Clock,” for details. • LPO clock— This clock is generated from an internal Low Power Oscillator that is completely independent of the MCG module. The LPO clock can be selected as the clock source to the RTC or COP modules. See Chapter 13, “Real-Time Counter (S08RTCV1),” and Section 5.4, “Computer Operating Properly (COP) Watchdog,” for details on using the LPO clock with these modules. • TPMCLK — TPMCLK is the optional external clock source for the TPM modules. The TPMCLK must be limited to 1/4th the frequency of the BUSCLK for synchronization. See Chapter 16, “Timer/Pulse-Width Modulator (S08TPMV3),” for more details. |
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