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HCS08 bảng dữ liệu(PDF) 53 Page - NXP Semiconductors |
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HCS08 bảng dữ liệu(HTML) 53 Page - NXP Semiconductors |
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53 / 374 page ![]() Chapter 4 Memory MC9S08JM60 Series Data Sheet, Rev. 5 Freescale Semiconductor 53 2. Write the command code for the desired command to FCMD. The five valid commands are blank check (0x05), byte program (0x20), burst program (0x25), page erase (0x40), and mass erase (0x41). The command code is latched into the command buffer. 3. Write a 1 to the FCBEF bit in FSTAT to clear FCBEF and launch the command (including its address and data information). A partial command sequence can be aborted manually by writing a 0 to FCBEF any time after the write to the memory array and before writing the 1 that clears FCBEF and launches the complete command. Aborting a command in this way sets the FACCERR access error flag which must be cleared before starting a new command. A strictly monitored procedure must be obeyed or the command will not be accepted. This minimizes the possibility of any unintended changes to the flash memory contents. The command complete flag (FCCF) indicates when a command is complete. The command sequence must be completed by clearing FCBEF to launch the command. Figure 4-2 is a flowchart for executing all of the commands except for burst programming. The FCDIV register must be initialized before using any flash commands. This only must be done once following a reset. Figure 4-2. Flash Program and Erase Flowchart START WRITE TO FLASH TO BUFFER ADDRESS AND DATA WRITE COMMAND TO FCMD NO YES FPVIOL OR WRITE 1 TO FCBEF TO LAUNCH COMMAND AND CLEAR FCBEF (Note 2) 1 0 FCCF ? ERROR EXIT DONE Note 2: Wait at least four bus cycles 0 FACCERR ? CLEAR ERROR FACCERR ? WRITE TO FCDIV (Note 1) Note 1: Required only once after reset. 1 before checking FCBEF or FCCF. FLASH PROGRAM AND ERASE FLOW |
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