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HCS08 bảng dữ liệu(PDF) 50 Page - NXP Semiconductors |
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HCS08 bảng dữ liệu(HTML) 50 Page - NXP Semiconductors |
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50 / 374 page ![]() Chapter 4 Memory MC9S08JM60 Series Data Sheet, Rev. 5 50 Freescale Semiconductor Nonvolatile flash registers, shown in Table 4-4, are located in the flash memory. These registers include an 8-byte backdoor key which optionally can be used to gain access to secure memory resources. During reset events, the contents of NVPROT and NVOPT in the nonvolatile register area of the flash memory are transferred into corresponding FPROT and FOPT working registers in the high-page registers to control security and block protection options. Provided the key enable (KEYEN) bit is 1, the 8-byte comparison key can be used to temporarily disengage memory security. This key mechanism can be accessed only through user code running in secure memory. (A security key cannot be entered directly through background debug commands.) This security key can be disabled completely by programming the KEYEN bit to 0. If the security key is disabled, the only way to disengage security is by mass erasing the flash if needed (normally through the background debug interface) and verifying that flash is blank. To avoid returning to secure mode after the next reset, program the security bits (SEC01:SEC00) to the unsecured state (1:0). 4.3 RAM (System RAM) The MC9S08JM60 series includes static RAM. The locations in RAM below 0x0100 can be accessed using the more efficient direct addressing mode, and any single bit in this area can be accessed with the bit manipulation instructions (BCLR, BSET, BRCLR, and BRSET). Locating the most frequently accessed program variables in this area of RAM is preferred. 0x1857 Reserved — — — — — — — — 0x1858 PTGPE — — PTGPE5 PTGPE4 PTGPE3 PTGPE2 PTGPE1 PTGPE0 0x1859 PTGSE — — PTGSE5 PTGSE4 PTGSE3 PTGSE2 PTGSE1 PTGSE0 0x185A PTGDS — — PTGDS5 PTGDS4 PTGDS3 PTGDS2 PTGDS1 PTGDS0 0x185B– 0x185F Reserved — — — — — — — — 1 This reserved bit must always be written to 0. Table 4-4. Nonvolatile Register Summary Address Register Name Bit 7 6 5 4 3 2 1 Bit 0 0xFFAE Reserved for storage of FTRIM 0 0 0 0 0 0 0FTRIM 0xFFAF Res. for storage of MCGTRIM TRIM 0xFFB0– 0xFFB7 NVBACKKEY 8-Byte Comparison Key 0xFFB8– 0xFFBC Reserved — — — — — — — — 0xFFBD NVPROT FPS7 FPS6 FPS5 FPS4 FPS3 FPS2 FPS1 FPDIS 0xFFBE Reserved — — — — — — — — 0xFFBF NVOPT KEYEN FNORED 0 0 0 0 SEC01 SEC00 Table 4-3. High-Page Register Summary (Sheet 3 of 3) Address Register Name Bit 7 6 5 4 3 2 1 Bit 0 |
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