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HCS08 bảng dữ liệu(PDF) 79 Page - NXP Semiconductors |
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HCS08 bảng dữ liệu(HTML) 79 Page - NXP Semiconductors |
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79 / 374 page ![]() Chapter 5 Resets, Interrupts, and System Configuration MC9S08JM60 Series Data Sheet, Rev. 5 Freescale Semiconductor 79 Table 5-11. SPMSC2 Register Field Descriptions Field Description 5 LVDV Low-Voltage Detect Voltage Select — This bit selects the low voltage detect (LVD) trip point setting.It also selects the warning voltage range. See Table 5-12. 4 LVWV Low-Voltage Warning Voltage Select — This bit selects the low voltage warning (LVW) trip point voltage. See Table 5-12. 3 PPDF Partial Power Down Flag — This read-only status bit indicates that the MCU has recovered from stop2 mode. 0 MCU has not recovered from stop2 mode. 1 MCU recovered from stop2 mode. 2 PPDACK Partial Power Down Acknowledge — Writing a 1 to PPDACK clears the PPDF bit 0 PPDC Partial Power Down Control — This write-once bit controls whether stop2 or stop3 mode is selected. 0 Stop3 mode enabled. 1 Stop2, partial power down, mode enabled. Table 5-12. LVD and LVW trip point typical values1 1 See Appendix A, “Electrical Characteristics,” for minimum and maximum values. LVDV:LVWV LVW Trip Point LVD Trip Point 0:0 VLVW0 = 2.74 V VLVD0 = 2.56 V 0:1 VLVW1 = 2.92 V 1:0 VLVW2 = 4.3 V VLVD1 = 4.0 V 1:1 VLVW3 = 4.6 V |
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