HCS08 datasheet(261/374 Pages) NXP

261 / 374 page

Serial Peripheral Interface (S08SPI16V1)

MC9S08JM60 Series Data Sheet, Rev. 5

Freescale Semiconductor

261

The direction of each serial I/O pin depends on the BIDIROE bit. If the pin is configured as an output,

serial data from the shift register is driven out on the pin. The same pin is also the serial input to the shift

The SPSCK is output for the master mode and input for the slave mode.

The SS is the input or output for the master mode, and it is always the input for the slave mode.

The bidirectional mode does not affect SPSCK and SS functions.

NOTE

In bidirectional master mode, with mode fault enabled, both data pins MISO

and MOSI can be occupied by the SPI, though MOSI is normally used for

transmissions in bidirectional mode and MISO is not used by the SPI. If a

mode fault occurs, the SPI is automatically switched to slave mode, in this

case MISO becomes occupied by the SPI and MOSI is not used. This has to

be considered, if the MISO pin is used for another purpose.

15.4.8

Error Conditions

The SPI has one error condition:

•

Mode fault error

15.4.8.1

Mode Fault Error

If the SS input becomes low while the SPI is configured as a master, it indicates a system error where more

than one master may be trying to drive the MOSI and SPSCK lines simultaneously. This condition is not

permitted in normal operation, and the MODF bit in the SPI status register is set automatically provided

the MODFEN bit is set.

Table 15-9. Normal Mode and Bidirectional Mode

When SPE = 1

Master Mode MSTR = 1

Slave Mode MSTR = 0

Normal Mode

SPC0 = 0

Bidirectional Mode

SPC0 = 1

SPI

MOSI

MISO

Serial Out

Serial In

SPI

MOSI

MISO

Serial In

Serial Out

SPI

MOMI

Serial Out

Serial In

BIDIROE

SPI

SISO

Serial In

Serial Out

BIDIROE

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