HCS08 datasheet(265/374 Pages) NXP

265 / 374 page

Serial Peripheral Interface (S08SPI16V1)

MC9S08JM60 Series Data Sheet, Rev. 5

Freescale Semiconductor

265

15.5

Initialization/Application Information

15.5.1

SPI Module Initialization Example

15.5.1.1

Initialization Sequence

Before the SPI module can be used for communication, an initialization procedure must be carried out, as

follows:

1. Update control register 1 (SPIxC1) to enable the SPI and to control interrupt enables. This register

also sets the SPI as master or slave, determines clock phase and polarity, and configures the main

SPI options.

2. Update control register 2 (SPIxC2) to enable additional SPI functions such as the SPI match

interrupt feature, the master mode-fault function, and bidirectional mode output. 8- or 16-bit mode

select and other optional features are controlled here as well.

3. Update the baud rate register (SPIxBR) to set the prescaler and bit rate divisor for an SPI master.

4. Update the hardware match register (SPIxMH:SPIxML) with the value to be compared to the

receive data register for triggering an interrupt if hardware match interrupts are enabled.

5. In the master, read SPIxS while SPTEF = 1, and then write to the transmit data register

(SPIxDH:SPIxDL) to begin transfer.

15.5.1.2

Pseudo—Code Example

In this example, the SPI module will be set up for master mode with only hardware match interrupts

enabled. The SPI will run in 16-bit mode at a maximum baud rate of bus clock divided by 2. Clock phase

and polarity will be set for an active-high SPI clock where the first edge on SPSCK occurs at the start of

the first cycle of a data transfer.

SPIxC1=0x54(%01010100)

Bit 7

SPIE

= 0

Disables receive and mode fault interrupts

Bit 6

SPE

= 1

Enables the SPI system

Bit 5

SPTIE

= 0

Disables SPI transmit interrupts

Bit 4

MSTR

= 1

Sets the SPI module as a master SPI device

Bit 3

CPOL

= 0

Configures SPI clock as active-high

Bit 2

CPHA

= 1

First edge on SPSCK at start of first data transfer cycle

Bit 1

SSOE

= 0

Determines SS pin function when mode fault enabled

Bit 0

LSBFE

= 0

SPI serial data transfers start with most significant bit

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