HCS08 datasheet(264/374 Pages) NXP

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Serial Peripheral Interface (S08SPI16V1)

MC9S08JM60 Series Data Sheet, Rev. 5

264

Freescale Semiconductor

the flag bits to determine what event caused the interrupt. The service routine should also clear the flag

bit(s) before returning from the ISR (usually near the beginning of the ISR).

15.4.10.1 MODF

MODF occurs when the master detects an error on the SS pin. The master SPI must be configured for the

MODF feature (see Table 15-2). Once MODF is set, the current transfer is aborted and the following bit is

changed:

•

MSTR=0, The master bit in SPIxC1 resets.

The MODF interrupt is reflected in the status register MODF flag. Clearing the flag will also clear the

interrupt. This interrupt will stay active while the MODF flag is set. MODF has an automatic clearing

process which is described in Section 15.3.4, “SPI Status Register (SPIxS).”

15.4.10.2 SPRF

SPRF occurs when new data has been received and copied to the SPI receive data buffer. In 8-bit mode,

SPRF is set only after all 8 bits have been shifted out of the shift register and into SPIxDL. In 16-bit mode,

SPRF is set only after all 16 bits have been shifted out of the shift register and into SPIxDH:SPIxDL.

Once SPRF is set, it does not clear until it is serviced. SPRF has an automatic clearing process which is

described in Section 15.3.4, “SPI Status Register (SPIxS).” In the event that the SPRF is not serviced

before the end of the next transfer (i.e. SPRF remains active throughout another transfer), the latter

transfers will be ignored and no new data will be copied into the SPIxDH:SPIxDL.

15.4.10.3 SPTEF

SPTEF occurs when the SPI transmit buffer is ready to accept new data. In 8-bit mode, SPTEF is set only

after all 8 bits have been moved from SPIxDL into the shifter. In 16-bit mode, SPTEF is set only after all

16 bits have been moved from SPIxDH:SPIxDL into the shifter.

Once SPTEF is set, it does not clear until it is serviced. SPTEF has an automatic clearing process which is

described in Section 15.3.4, “SPI Status Register (SPIxS).

15.4.10.4 SPMF

SPMF occurs when the data in the receive data buffer is equal to the data in the SPI match register. In 8-bit

mode, SPMF is set only after bits 8–0 in the receive data buffer are determined to be equivalent to the value

in SPIxML. In 16-bit mode, SPMF is set after bits 15–0 in the receive data buffer are determined to be

equivalent to the value in SPIxMH:SPIxML.

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