HCS08 datasheet(234/290 Pages) MOTOROLA

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Analog-to-Digital Converter (ATD) Module

MC9S08GB/GT

234

MOTOROLA

CCF — Conversion Complete Flag

The CCF is a read-only bit which is set each time a conversion is complete. The CCF bit is cleared

whenever the ATDSC register is written. It is also cleared whenever the result registers, ATDRH or

ATDRL, are read.

1 = Current conversion is complete.

0 = Current conversion is not complete.

ATDIE — ATD Interrupt Enabled

When this bit is set, an interrupt is generated upon completion of an ATD conversion. At this time, the

result registers contain the result data generated by the conversion. The interrupt will remain pending

as long as the conversion complete flag CCF is set. If the ATDIE bit is cleared, then the CCF bit must

be polled to determine when the conversion is complete. Note that system reset clears pending

interrupts.

1 = ATD interrupt enabled.

0 = ATD interrupt disabled.

ATDCO — ATD Continuous Conversion

When this bit is set, the ATD will convert samples continuously and update the result registers at the

end of each conversion. When this bit is cleared, only one conversion is completed between writes to

the ATDSC register.

1 = Continuous conversion mode.

0 = Single conversion mode.

ATDCH — Analog Input Channel Select

This field of bits selects the analog input channel whose signal is sampled and converted to digital

codes. Table 14-5 lists the coding used to select the various analog input channels.

Table 14-5 Analog Input Channel Select Coding

ATDCH

Analog Input Channel

AD0

AD1

AD2

AD3

AD4

AD5

AD6

AD7

08–1D

Reserved (default to VREFL)

VREFH

VREFL

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