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HCS08 bảng dữ liệu(PDF) 9 Page - Motorola, Inc |
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HCS08 bảng dữ liệu(HTML) 9 Page - Motorola, Inc |
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9 / 290 page ![]() Data Sheet — MC9S08GB60/D V1.5 MOTOROLA 9 MC9S08GB/GT 5.7 Real-Time Interrupt (RTI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 5.8 Reset, Interrupt, and System Control Registers and Control Bits . . . . . . . . . . . . . . 70 5.8.1 Interrupt Pin Request Status and Control Register (IRQSC) . . . . . . . . . . . . . . . . 70 5.8.2 System Reset Status Register (SRS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 5.8.3 System Background Debug Force Reset Register (SBDFR) . . . . . . . . . . . . . . . . 73 5.8.4 System Options Register (SOPT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 5.8.5 System Device Identification Register (SDIDH, SDIDL) . . . . . . . . . . . . . . . . . . . 75 5.8.6 System Real-Time Interrupt Status and Control Register (SRTISC) . . . . . . . . . . 75 5.8.7 System Power Management Status and Control 1 Register (SPMSC1) . . . . . . . 77 5.8.8 System Power Management Status and Control 2 Register (SPMSC2) . . . . . . . 78 Section 6 Internal Clock Generator (ICG) Module 6.1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 6.1.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 6.1.2 Modes of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 6.2 External Signal Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 6.2.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 6.2.2 Detailed Signal Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86 6.2.3 External Clock Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86 6.2.4 External Crystal/Resonator Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 6.3 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 6.3.1 Off Mode (Off) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 6.3.2 Self-Clocked Mode (SCM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 6.3.3 FLL Engaged, Internal Clock (FEI) Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 6.3.4 FLL Bypassed, External Clock (FBE) Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 6.3.5 FLL Engaged, External Clock (FEE) Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91 6.3.6 FLL Lock and Loss-of-Lock Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91 6.3.7 FLL Loss-of-Clock Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 6.3.8 Clock Mode Requirements. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 6.4 Initialization/Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94 6.4.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94 6.4.2 Example #1: External Crystal = 32 kHz, Bus Frequency = 4.19 MHz . . . . . . . . . 96 6.4.3 Example #2: External Crystal = 4 MHz, Bus Frequency = 20 MHz. . . . . . . . . . . 98 6.4.4 Example #3: No External Crystal Connection, 5.4 MHz Bus Frequency . . . . . . 100 6.4.5 Example #4: Internal Clock Generator Trim . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 6.5 ICG Registers and Control Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103 |
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