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HCS08 bảng dữ liệu(PDF) 48 Page - Motorola, Inc |
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HCS08 bảng dữ liệu(HTML) 48 Page - Motorola, Inc |
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48 / 290 page ![]() Memory MC9S08GB/GT 48 MOTOROLA Nonvolatile FLASH registers, shown in Table 4-4, are located in the FLASH memory. These registers include an 8-byte backdoor key which optionally can be used to gain access to secure memory resources. During reset events, the contents of NVPROT and NVOPT in the nonvolatile register area of the FLASH memory are transferred into corresponding FPROT and FOPT working registers in the high-page registers to control security and block protection options. Provided the key enable (KEYEN) bit is 1, the 8-byte comparison key can be used to temporarily disengage memory security. This key mechanism can be accessed only through user code running in secure memory. (A security key cannot be entered directly through background debug commands.) This security key can be disabled completely by programming the KEYEN bit to 0. If the security key is disabled, the only way to disengage security is by mass erasing the FLASH if needed (normally through the background debug interface) and verifying that FLASH is blank. To avoid returning to secure mode after the next reset, program the security bits (SEC01:SEC00) to the unsecured state (1:0). 4.3 RAM The MC9S08GB/GT includes static RAM. The locations in RAM below $0100 can be accessed using the more efficient direct addressing mode, and any single bit in this area can be accessed with the bit manipulation instructions (BCLR, BSET, BRCLR, and BRSET). Locating the most frequently accessed program variables in this area of RAM is preferred. The RAM retains data when the MCU is in low-power wait, stop2, or stop3 mode. At power-on or after wakeup from stop1, the contents of RAM are uninitialized. RAM data is unaffected by any reset provided that the supply voltage does not drop below the minimum value for RAM retention. For compatibility with older M68HC05 MCUs, the HCS08 resets the stack pointer to $00FF. In the MC9S08GB/GT, it is usually best to reinitialize the stack pointer to the top of the RAM so the direct page RAM can be used for frequently accessed RAM variables and bit-addressable program variables. Include the following 2-instruction sequence in your reset initialization routine (where RamLast is equated to the highest address of the RAM in the Motorola-provided equate file). LDHX #RamLast+1 ;point one past RAM TXS ;SP<-(H:X-1) Table 4-4 Nonvolatile Register Summary Address Register Name Bit 7 654321 Bit 0 $FFB0 – $FFB7 NVBACKKEY 8-Byte Comparison Key $FFB8 – $FFBC Reserved — — — — — — — — — — — — — — — — $FFBD NVPROT FPOPEN FPDIS FPS2 FPS1 FPS0 0 0 0 $FFBE Reserved(1) NOTES: 1. This location can be used to store the factory trim value for the ICG. — — — — — — — — $FFBF NVOPT KEYEN FNORED 0 0 0 0 SEC01 SEC00 |
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