HCS08 datasheet(33/290 Pages) MOTOROLA

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Data Sheet — MC9S08GB60/D V1.5

MOTOROLA

MC9S08GB/GT

Section 3 Modes of Operation

3.1 Introduction

The operating modes of the MC9S08GB/GT are described in this section. Entry into each mode, exit from

each mode, and functionality while in each of the modes are described.

3.2 Features

•

Active background mode for code development

•

Wait mode:

–

CPU shuts down to conserve power

–

System clocks running

–

Full voltage regulation maintained

•

Stop modes:

–

System clocks stopped; voltage regulator in standby

–

Stop1 — Full power down of internal circuits for maximum power savings

–

Stop2 — Partial power down of internal circuits, RAM contents retained

–

Stop3 — All internal circuits powered for fast recovery

3.3 Run Mode

This is the normal operating mode for the MC9S08GB/GT. This mode is selected when the BKGD/MS

pin is high at the rising edge of reset. In this mode, the CPU executes code from internal memory with

execution beginning at the address fetched from memory at $FFFE:$FFFF after reset.

3.4 Active Background Mode

The active background mode functions are managed through the background debug controller (BDC) in

the HCS08 core. The BDC, together with the on-chip debug module (DBG), provide the means for

analyzing MCU operation during software development.

Active background mode is entered in any of five ways:

•

When the BKGD/MS pin is low at the rising edge of reset

•

When a BACKGROUND command is received through the BKGD pin

•

When a BGND instruction is executed

•

When encountering a BDC breakpoint

•

When encountering a DBG breakpoint

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