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HCS08 bảng dữ liệu(PDF) 69 Page - Motorola, Inc |
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HCS08 bảng dữ liệu(HTML) 69 Page - Motorola, Inc |
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69 / 290 page ![]() Data Sheet — MC9S08GB60/D V1.5 MOTOROLA 69 MC9S08GB/GT 5.6 Low-Voltage Detect (LVD) System The MC9S08GB/GT includes a system to protect against low voltage conditions in order to protect memory contents and control MCU system states during supply voltage variations. The system is comprised of a power-on reset (POR) circuit and an LVD circuit with a user selectable trip voltage, either high (VLVDH) or low (VLVDL). The LVD circuit is enabled when LVDE in SPMSC1 is high and the trip voltage is selected by LVDV in SPMSC2. The LVD is disabled upon entering any of the stop modes unless the LVDSE bit is set. If LVDSE and LVDE are both set, then the MCU cannot enter stop1 or stop2, and the current consumption in stop3 with the LVD enabled will be greater. 5.6.1 Power-On Reset Operation When power is initially applied to the MCU, or when the supply voltage drops below the VPOR level, the POR circuit will cause a reset condition. As the supply voltage rises, the LVD circuit will hold the chip in reset until the supply has risen above the VLVDH level. Both the POR bit and the LVD bit in SRS are set following a POR. 5.6.2 LVD Reset Operation The LVD can be configured to generate a reset upon detection of a low voltage condition by setting LVDRE to 1. Once an LVD reset has occurred, the LVD system will hold the MCU in reset until the supply voltage has risen above the level determined by LVDV. The LVD bit in the SRS register is set following either an LVD reset or POR. 5.6.3 LVD Interrupt Operation When a low voltage condition is detected and the LVD circuit is configured for interrupt operation (LVDE set, LVDIE set, and LVDRE clear), then LVDF will be set and an LVD interrupt will occur. 5.6.4 Low-Voltage Warning (LVW) The LVD system has a low voltage warning flag to indicate to the user that the supply voltage is approaching, but is still above, the LVD voltage. The LVW does not have an interrupt associated with it. There are two user selectable trip voltages for the LVW, one high (VLVWH) and one low (VLVWL). The trip voltage is selected by LVWV in SPMSC2. 5.7 Real-Time Interrupt (RTI) The real-time interrupt function can be used to generate periodic interrupts based on a divide of the external oscillator during run mode. It can also be used to wake the MCU from stop2 mode or stop3 mode. The RTI control includes an internal 1-kHz clock source. Wakeup from stop2 can only be done using this internal clock. Wakeup from stop3 can be done using either the 1-kHz clock or the external oscillator. When using the external oscillator, it must be enabled in stop (OSCSTEN = 1) and configured for low bandwidth operation (RANGE = 0). |
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