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HCS08 bảng dữ liệu(PDF) 34 Page - Motorola, Inc

tên linh kiện HCS08
Giải thích chi tiết về linh kiện  Microcontrollers
PDF  290 Pages
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nhà sản xuất  MOTOROLA [Motorola, Inc]
Trang chủ  http://www.freescale.com
Logo MOTOROLA - Motorola, Inc

HCS08 bảng dữ liệu(HTML) 34 Page - Motorola, Inc

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Modes of Operation
MC9S08GB/GT
34
MOTOROLA
Once in active background mode, the CPU is held in a suspended state waiting for serial background
commands rather than executing instructions from the user’s application program.
Background commands are of two types:
•
Non-intrusive commands, defined as commands that can be issued while the user program is
running. Non-intrusive commands can be issued through the BKGD pin while the MCU is in run
mode; non-intrusive commands can also be executed when the MCU is in the active background
mode. Non-intrusive commands include:
–
Memory access commands
–
Memory-access-with-status commands
–
BDC register access commands
–
The BACKGROUND command
•
Active background commands, which can only be executed while the MCU is in active background
mode. Active background commands include commands to:
–
Read or write CPU registers
–
Trace one user program instruction at a time
–
Leave active background mode to return to the user’s application program (GO)
The active background mode is used to program a bootloader or user application program into the FLASH
program memory before the MCU is operated in run mode for the first time. When the MC9S08GB/GT is
shipped from the Motorola factory, the FLASH program memory is erased by default unless specifically
noted so there is no program that could be executed in run mode until the FLASH memory is initially
programmed. The active background mode can also be used to erase and reprogram the FLASH memory
after it has been previously programmed.
For additional information about the active background mode, refer to the Development Support section.
3.5 Wait Mode
Wait mode is entered by executing a WAIT instruction. Upon execution of the WAIT instruction, the CPU
enters a low-power state in which it is not clocked. The I bit in CCR is cleared when the CPU enters the
wait mode, enabling interrupts. When an interrupt request occurs, the CPU exits the wait mode and
resumes processing, beginning with the stacking operations leading to the interrupt service routine.
While the MCU is in wait mode, there are some restrictions on which background debug commands can
be used. Only the BACKGROUND command and memory-access-with-status commands are available
when the MCU is in wait mode. The memory-access-with-status commands do not allow memory access,
but they report an error indicating that the MCU is in either stop or wait mode. The BACKGROUND
command can be used to wake the MCU from wait mode and enter active background mode.



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