HCS08 datasheet(77/290 Pages) MOTOROLA

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Data Sheet — MC9S08GB60/D V1.5

MOTOROLA

MC9S08GB/GT

5.8.7 System Power Management Status and Control 1 Register (SPMSC1)

Figure 5-8 System Power Management Status and Control 1 Register (SPMSC1)

LVDF — Low-Voltage Detect Flag

Provided LVDE = 1, this read-only status bit indicates a low-voltage detect event.

LVDACK — Low-Voltage Detect Acknowledge

This write-only bit is used to acknowledge low voltage detection errors (write 1 to clear LVDF). Reads

always return logic 0.

LVDIE — Low-Voltage Detect Interrupt Enable

This read/write bit enables hardware interrupt requests for LVDF.

1 = Request a hardware interrupt when LVDF = 1.

0 = Hardware interrupt disabled (use polling).

LVDRE — Low-Voltage Detect Reset Enable

This read/write bit enables LVDF events to generate a hardware reset (provided LVDE = 1).

1 = Force an MCU reset when LVDF = 1.

0 = LVDF does not generate hardware resets.

LVDSE — Low-Voltage Detect Stop Enable

Provided LVDE = 1, this read/write bit determines whether the low-voltage detect function operates

when the MCU is in stop mode.

1 = Low-voltage detect enabled during stop mode.

0 = Low-voltage detect disabled during stop mode.

LVDE — Low-Voltage Detect Enable

This read/write bit enables low-voltage detect logic and qualifies the operation of other bits in this

1 = LVD logic enabled.

0 = LVD logic disabled.

Bit 7

54321

Bit 0

Read:

LVDF

LVDIE

LVDRE(1)

NOTES:

1. This bit can be written only one time after reset. Additional writes are ignored.

LVDSE(1)

LVDE(1)

Write:

LVDACK

Reset:

011100

= Unimplemented or Reserved

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