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HCS08 bảng dữ liệu(PDF) 232 Page - Motorola, Inc |
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HCS08 bảng dữ liệu(HTML) 232 Page - Motorola, Inc |
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232 / 290 page ![]() Analog-to-Digital Converter (ATD) Module MC9S08GB/GT 232 MOTOROLA The effect of the DJM bit on the result is shown in Table 14-3. 1 = Result register data is right justified. 0 = Result register data is left justified. RES8 — ATD Resolution Select This bit determines the resolution of the ATD converter, 8-bits or 10-bits. The ATD converter has the accuracy of a 10-bit converter. However, if 8-bit compatibility is required, selecting 8-bit resolution will map result data bits 9-2 onto ATDRH bits 7-0. The effect of the RES8 bit on the result is shown in Table 14-3. 1 = 8-bit resolution selected. 0 = 10-bit resolution selected. SGN — Signed Result Select This bit determines whether the result will be signed or unsigned data. Signed data is represented as 2’s complement data and is achieved by complementing the MSB of the result. Signed data mode can be used only when the result is left justified (DJM = 0) and is not available for right-justified mode (DJM = 1). When a signed result is selected, the range for conversions becomes –512 ($200) to 511 ($1FF) for 10-bit resolution and –128 ($80) to 127 ($7F) for 8-bit resolution. The effect of the SGN bit on the result is shown in Table 14-3. 1 = Left justified result data is signed. 0 = Left justified result data is unsigned. Table 14-3 Available Result Data Formats PRS — Prescaler Rate Select This field of bits determines the prescaled factor for the ATD conversion clock. Table 14-4 illustrates the divide-by operation and the appropriate range of bus clock frequencies. RES8 DJM SGN Data Formats of Result Analog Input VREFH =VDDA, VREFL =VSSA ATDRH:ATDRL VDDA VSSA 1 0 0 8-bit : left justified : unsigned $FF:$00 $00:$00 1 0 1 8-bit : left justified : signed $7F:$00 $80:$00 11 X(1) NOTES: 1. The SGN bit is only effective when DJM = 0. When DJM = 1, SGN is ignored. 8-bit : left justified(2) : unsigned 2. 8-bit results are always in ATDRH. $FF:$00 $00:$00 0 0 0 10-bit : left justified : unsigned $FF:$C0 $00:$00 0 0 1 10-bit : left justified : signed $7F:$C0 $80:$00 01 X1 10-bit : right justified : unsigned $03:$FF $00:$00 |
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