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HCS08 bảng dữ liệu(PDF) 230 Page - Motorola, Inc |
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HCS08 bảng dữ liệu(HTML) 230 Page - Motorola, Inc |
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230 / 290 page ![]() Analog-to-Digital Converter (ATD) Module MC9S08GB/GT 230 MOTOROLA 14.4 Resets The ATD module is reset on system reset. If the system reset signal is activated, the ATD registers are initialized back to their reset state and the ATD module is powered down. This occurs as a function of the register file initialization; the reset definition of the ATDPU bit (power down bit) is zero or disabled. The MCU places the module back into an initialized state. If the module is performing a conversion, the current conversion is terminated, the conversion complete flag is cleared, and the SAR register bits are cleared. Any pending interrupts are also cancelled. Note that the control, test, and status registers are initialized on reset; the initialized register state is defined in the register description section of this specification. Enabling the module (using the ATDPU bit) does not cause the module to reset since the register file is not initialized. Finally, writing to control register ATDC does not cause the module to reset; the current conversion will be terminated. 14.5 Interrupts The ATD module originates interrupt requests and the MCU handles or services these requests. Details on how the ATD interrupt requests are handled can be found in the Resets, Interrupts, and System Configuration section. The ATD interrupt function is enabled by setting the ATDIE bit in the ATDSC register. When the ATDIE bit is set, an interrupt is generated at the end of an ATD conversion and the ATD result registers (ATDRH and ATDRL) contain the result data generated by the conversion. If the interrupt function is disabled (ATDIE = 0), then the CCF flag must be polled to determine when a conversion is complete. The interrupt will remain pending as long as the CCF flag is set. The CCF bit is cleared whenever the ATD status and control (ATDSC) register is written. The CCF bit is also cleared whenever the ATD result registers (ATDRH or ATDRL) are read. 14.6 ATD Registers and Control Bits The ATD has seven registers which control ATD functions. Refer to the direct-page register summary in the Memory section of this data sheet for the absolute address assignments for all ATD registers. This section refers to registers and control bits only by their names. A Motorola-provided equate or header file is used to translate these names into the appropriate absolute addresses. Table 14-2 Interrupt Summary Interrupt Local Enable Description CCF ATDIE Conversion complete |
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