HCS08 datasheet(141/290 Pages) MOTOROLA

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Data Sheet — MC9S08GB60/D V1.5

MOTOROLA

141

MC9S08GB/GT

PTCDDn — Data Direction for Port C Bit n (n = 0–7)

These read/write bits control the direction of port C pins and what is read for PTCD reads.

1 = Output driver enabled for port C bit n and PTCD reads return the contents of PTCDn.

0 = Input (output driver disabled) and reads return the pin value.

8.6.4 Port D Registers (PTDD, PTDPE, PTDSE, and PTDDD)

Port D includes eight pins shared between general-purpose I/O, TPM1 and TPM2. Port D pins used as

general-purpose I/O pins are controlled by the port D data (PTDD), data direction (PTDDD) and pullup

enable (PTDPE) and slew rate control (PTDSE) registers.

If a TPM takes control of a port D pin, the corresponding PTDDD bit are ignored. When the TPM is in

output compare mode, the corresponding PTDSE can be used to provide slew rate on the pin. When the

TPM is in input capture mode, the corresponding PTDPE can be used, provided the corresponding

PTDDD bit is a logic 0, to provide a pullup device on the pin.

Reads of PTDD will return the logic value of the corresponding pin, provided PTDDD is a logic 0.

Figure 8-12 Port D Registers

PTDD

Bit 7

654321

Bit 0

Read:

PTDD7

PTDD6

PTDD5

PTDD4

PTDD3

PTDD2

PTDD1

PTDD0

Write:

Reset:

00000000

PTDPE

Read:

PTDPE7

PTDPE6

PTDPE5

PTDPE4

PTDPE3

PTDPE2

PTDPE1

PTDPE0

Write:

Reset:

00000000

PTDSE

Read:

PTDSE7

PTDSE6

PTDSE5

PTDSE4

PTDSE3

PTDSE2

PTDSE1

PTDSE0

Write:

Reset:

00000000

PTDDD

Read:

PTDDD7

PTDDD6

PTDDD5

PTDDD4

PTDDD3

PTDDD2

PTDDD1

PTDDD0

Write:

Reset:

00000000

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