AD4884BBCZ datasheet(91/116 Pages) AD

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Data Sheet

AD4884

DIGITAL FEATURES

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Rev. 0 | 91 of 116

SYSTEM ERROR CORRECTION

COEFFICIENTS

Systematic gain and offset errors exist in all practical data acquis-

ition circuits, and thus, the need for correction is essential to

maximize the precision of the measurement channel. While these

quantities can be corrected for in the host processor, implementa-

tion can be inefficient and consume more power than if integrated

within the data converter. To minimize these challenges for the end

user, the AD4884 has integrated both gain and offset correction on

a per sample basis.

To describe the available error corrections, consider that the trans-

fer function of an ideal ADC can be described by the straight line

equation:

y = mx + c

This equation can be applied to the ADC transfer function, where:

y is the corrected ADC result.

m is the gain or slope of the line.

x is the uncorrected ADC result.

c is the offset.

The gain or slop of the line can be described as follows:

m = (y2 − y1)/(x2 − x1)

where the following are in volts:

y2 is the input voltage at close to the positive full-scale input.

y1 is the input voltage at close to the negative full-scale input.

x2 is the converted voltage with the y2 voltage applied at the input.

x1 is the converted voltage with the y1 voltage applied at the input.

The ideal slope or gain is m = 1V/V

The system error correction coefficients in the Offset Error Correc-

tion and Gain Error Correction sections detail how signal chain

errors in offset (c) and gain (m) can be corrected using the configu-

ration registers of each AD4884 channel.

Offset Error Correction

The AD4884 is factory calibrated for low zero error. To account

for system offset errors that may be present in the analog signal

chain in front of a channel, an offset error correction functionality

is provided. The correction value to be applied is written to the

OFFSET bit field in the offset correction register of the correspond-

ing channel (see the Offset Correction Register, Address 0x25 and

0x26).

The OFFSET bit field is a 12-bit value in two's complement data for-

mat. The LSB size for this field is the same as the ADC conversion

LSB (91.55μV). The range for offset error correction is therefore

+2047 × LSB (0x7FF) to −2048 × LSB (0x800). This shows an

offset correction voltage range between +187.4mV and −187.5mV.

The default value for the OFFSET bit field, after power on, or after

a software reset, is 0x000, which shows the zero offset correction

applied.

Gain Error Correction

The AD4884 is factory calibrated to minimize its intrinsic gain error.

To account for system gain errors introduced by the analog signal

chain in front of a channel, a gain error correction functionality is

provided. The gain correction factor to be applied depends on the

value written to the GAIN bit field in the gain correction register

of the corresponding channel (see the Gain Correction Register,

Address 0x27 and 0x28).

The GAIN bit field is a 10-bit value that allows a nominal gain error

correction of ±1.5594% of full scale. The 10-bit register is coded

in a straight binary data format, the gain error can be adjusted

with a resolution of 1.5594%/512 = 0.00305%. A value of 0x3FF

results in a gain correction factor of 1.0 + 0.015594, and a value

of 0x001 results in a gain correction factor of 1.0 − 0.015594. The

default value after power on, or software reset, is 0x200. This value

shows no gain error correction being applied to the ADC results,

and allows for lower latency operation (see ADC Result Latency

and LVDS Interface Alignment).

To determine the system gain error that must be applied, the user

can perform a two-point voltage measurement with gain error cor-

rection disabled, preferably close to positive and negative full-scale

inputs, and use the slope or gain equation in the System Error

Correction Coefficients.

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