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AD4884BBCZ bảng dữ liệu(PDF) 47 Page - Analog Devices

tên linh kiện AD4884BBCZ
Giải thích chi tiết về linh kiện  Dual-Channel 16-Bit, 20MSPS, SAR ADC with Analog Front End
PDF  116 Pages
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nhà sản xuất  AD [Analog Devices]
Trang chủ  http://www.analog.com
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AD4884BBCZ bảng dữ liệu(HTML) 47 Page - Analog Devices

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Data Sheet
AD4884
APPLICATIONS INFORMATION
analog.com
Rev. 0 | 47 of 116
POWER SOLUTION
With such low noise and up to a 20MHz sampling rate, it is
important that careful consideration is taken for the power solution
of applications to ensure that the low noise supplies provided to the
AD4884 do not become a source of performance or accuracy deg-
radation. To aid ease of use and to help reduce external required
components, four internal LDO regulators are integrated within the
AD4884. For more details on these regulators, see the Internally
Regulated Supply Configuration section. Also, note that the internal
supply decoupling capacitors are included for all supply rails (see
Table 8), whether generated internally or externally, reducing exter-
nal component count, simplifying use, and offering huge benefits to
PCB layout, routing, and design density.
For generating the required supplies in the application, excellent
choice LDO regulators are the LT3045 or ADP150 for positive rails,
while ADP7182 or ADP7183 can be used to create a negative rail
for −VS, all of them offer ultra-low noise and excellent power supply
rejection. For high efficiency, step-down switching regulators, the
LT8604C is a good choice that can be used for both positive
and negative rail generation, however, a user must take care in
the design of the switching regulator circuity because switching fre-
quencies are possibly to be within the application signal bandwidth,
and although the AD4884 has high AC power supply rejection on
its supplies, appropriate consideration must be given to the supply
rails.
The AD4884 is fully specified with the nominal FDA supply voltages
of +VS = +5V and −VS = −1V, which allow reaching optimum
performance at very low-power consumption. The voltage span
across ±VS can be increased up to the specified maximum of 10V,
with a penalty paid in the form of increased power consumption.
This enables the reuse of an existing quiet rail in the system (for
example, a −5V rail for −VS) if convenient. Conversely, the FDA
supply span can be lowered down to a minimum of 3V for the
absolute minimum power consumption, but performance degrada-
tion must be expected as FDA supply span decreases (see Figure
7) because the full ADC input range cannot be exercised at the
specified distortion levels.



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