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AD4884BBCZ bảng dữ liệu(PDF) 1 Page - Analog Devices |
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AD4884BBCZ bảng dữ liệu(HTML) 1 Page - Analog Devices |
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1 / 116 page  Data Sheet AD4884 Dual-Channel 16-Bit, 20MSPS, SAR ADC with Analog Front End Rev. 0 DOCUMENT FEEDBACK TECHNICAL SUPPORT One Analog Way, Wilmington, MA 01887-2356, U.S.A. | Tel: 781.935.5565 | ©2026 Analog Devices, Inc. All rights reserved. FEATURES ► Integrated fully-differential ADC drivers ► Wide input common-mode voltage range ► High common-mode rejection ► Single-ended to differential conversion ► Gain options include: 1.03, 1.25, 1.53, 2.03, 2.74, 4.11, and 5.77 ► Integrated gain-setting resistors ► High performance ► 16-bit resolution, no missing codes ► Throughput: 20MSPS per channel ► Conversion latency: 78.13ns ► INL: ±5ppm (typical), ±12ppm (maximum) ► SNR/THD ► 91.9dBFS (typical)/−111.0dBc (typical) at fIN = 1kHz ► 90.9dBFS (typical)/−107.8dBc (typical) at fIN = 500kHz ► Noise spectral density: −158.4dBFS/Hz ► Low power ► 97.9mW per channel typical at 20MSPS ► Integrated, low-drift reference buffers and decoupling ► Integrated VCM generation ► Digital features and data interface ► Conversion result FIFO, 16k samples per channel ► Digital averaging filter with up to 210 decimation ► SPI configuration per channel ► Configurable data interface per channel ► Single lane, DDR, serial LVDS, 320Mbps per lane ► Dual lane, DDR, serial LVDS, 160Mbps per lane ► Single/quad lane SPI data interface ► Package ► 196-ball, 10mm x 10mm CSP_BGA, 0.65mm pitch ► Integrated supply decoupling capacitors ► Operating temperature range: −40°C to +85°C APPLICATIONS ► Digital imaging ► Cell analysis ► Spectroscopy ► High-speed data acquisition ► Digital control loops, hardware in the loop ► Power quality analysis ► Source measurement units ► Nondestructive test GENERAL DESCRIPTION The AD4884 is a dual-channel, low noise, low power, high-speed, 16-bit, successive approximation register (SAR) analog-to-digital converter (ADC) with integrated fully-differential drivers (FDA) and gain-setting resistors. The two channels can be sampled either simultaneously or independently, which offers flexibility for a wide range of applications. The integration of the ADC drivers, low drift reference buffers, low dropout (LDO) regulators along with all critical decoupling capaci- tors greatly simplifies analog front-end design challenges. Specified performance is easier to achieve, which requires a simpler and more compact printed circuit board (PCB) layout. Optimized for input signals up to 1MHz, the AD4884 delivers low noise and exceptional linearity at remarkably low power consump- tion, which makes it ideal for many precision data acquisition systems. Anti-aliasing filter requirements can be relaxed by taking advantage of the high sample rate to oversample, then apply integrated digital filtering and decimation to reduce noise and deliver an increase in dynamic range for applications where ultra-low latency is not required. The AD4884 features a SAR architecture that results in a conver- sion latency of just 78.13ns. Therefore, it is a good fit for wide band- width applications that have multiplexed input signals, applications that require extremely low latency, or both. Such high throughput and low-latency applications can benefit from the two independent, multilane low-voltage differential signaling (LVDS) interfaces. Alter- natively, the load on the digital host can be eased by storing the captured data in the on-chip, 16k samples per channel, first in, first out (FIFO) memory, then asynchronously accessing it via the serial-peripheral interface (SPI) data interfaces. TYPICAL APPLICATION DIAGRAM Figure 1. AD4884 Typical Application Diagram |
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