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HCS08 bảng dữ liệu(PDF) 256 Page - Motorola, Inc |
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HCS08 bảng dữ liệu(HTML) 256 Page - Motorola, Inc |
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256 / 290 page ![]() Development Support MC9S08GB/GT 256 MOTOROLA ARM — Arm Control Controls whether the debugger is comparing and storing information in the FIFO. A write is used to set this bit (and the ARMF bit) and completion of a debug run automatically clears it. Any debug run can be manually stopped by writing 0 to ARM or to DBGEN. 1 = Debugger armed. 0 = Debugger not armed. TAG — Tag/Force Select Controls whether break requests to the CPU will be tag or force type requests. If BRKEN = 0, this bit has no meaning or effect. 1 = CPU breaks requested as tag type requests. 0 = CPU breaks requested as force type requests. BRKEN — Break Enable Controls whether a trigger event will generate a break request to the CPU. Trigger events can cause information to be stored in the FIFO without generating a break request to the CPU. For an end trace, CPU break requests are issued to the CPU when the comparator(s) and R/W meet the trigger requirements. For a begin trace, CPU break requests are issued when the FIFO becomes full. TRGSEL does not affect the timing of CPU break requests. 1 = Triggers cause a break request to the CPU. 0 = CPU break requests not enabled. RWA — R/W Comparison Value for Comparator A When RWAEN = 1, this bit determines whether a read or a write access qualifies comparator A. When RWAEN = 0, RWA and the R/W signal do not affect comparator A. 1 = Comparator A can only match on a read cycle. 0 = Comparator A can only match on a write cycle. RWAEN — Enable R/W for Comparator A Controls whether the level of R/W is considered for a comparator A match. 1 = R/W is used in comparison A. 0 = R/W is not used in comparison A. RWB — R/W Comparison Value for Comparator B When RWBEN = 1, this bit determines whether a read or a write access qualifies comparator B. When RWBEN = 0, RWB and the R/W signal do not affect comparator B. 1 = Comparator B can match only on a read cycle. 0 = Comparator B can match only on a write cycle. RWBEN — Enable R/W for Comparator B Controls whether the level of R/W is considered for a comparator B match. 1 = R/W is used in comparison B. 0 = R/W is not used in comparison B. |
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