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HCS08 bảng dữ liệu(PDF) 259 Page - Motorola, Inc |
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HCS08 bảng dữ liệu(HTML) 259 Page - Motorola, Inc |
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259 / 290 page ![]() Data Sheet — MC9S08GB60/D V1.5 MOTOROLA 259 MC9S08GB/GT ARMF — Arm Flag While DBGEN = 1, this status bit is a read-only image of the ARM bit in DBGC. This bit is set by writing 1 to the ARM control bit in DBGC (while DBGEN = 1) and is automatically cleared at the end of a debug run. A debug run is completed when the FIFO is full (begin trace) or when a trigger event is detected (end trace). A debug run can also be ended manually by writing 0 to the ARM or DBGEN bits in DBGC. 1 = Debugger armed. 0 = Debugger not armed. CNT3:CNT2:CNT1:CNT0 — FIFO Valid Count These bits are cleared at the start of a debug run and indicate the number of words of valid data in the FIFO at the end of a debug run. The value in CNT does not decrement as data is read out of the FIFO. The external debug host is responsible for keeping track of the count as information is read out of the FIFO. Table 15-3 CNT Status Bits CNT[3:0] Valid Words in FIFO 0000 No valid data 0001 1 0010 2 0011 3 0100 4 0101 5 0110 6 0111 7 1000 8 |
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