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HCS08 bảng dữ liệu(PDF) 202 Page - Motorola, Inc |
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HCS08 bảng dữ liệu(HTML) 202 Page - Motorola, Inc |
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202 / 290 page ![]() Serial Peripheral Interface (SPI) Module MC9S08GB/GT 202 MOTOROLA 12.4.2 SPI Control Register 2 (SPIC2) This read/write register is used to control optional features of the SPI system. Bits 7, 6, 5, and 2 are not implemented and always read 0. Figure 12-8 SPI Control Register 2 (SPIC2) MODFEN — Master Mode-Fault Function Enable When the SPI is configured for slave mode, this bit has no meaning or effect. (The SS pin is the slave select input.) In master mode, this bit determines how the SS pin is used (refer to Table 12-1 for more details). 1 = Mode fault function enabled, master SS pin acts as the mode fault input or the slave select output. 0 = Mode fault function disabled, master SS pin reverts to general-purpose I/O not controlled by SPI. BIDIROE — Bidirectional Mode Output Enable When bidirectional mode is enabled by SPI pin control 0 (SPC0) = 1, BIDIROE determines whether the SPI data output driver is enabled to the single bidirectional SPI I/O pin. Depending on whether the SPI is configured as a master or a slave, it uses either the MOSI (MOMI) or MISO (SISO) pin, respectively, as the single SPI data I/O pin. When SPC0 = 0, BIDIROE has no meaning or effect. 1 = SPI I/O pin enabled as an output. 0 = Output driver disabled so SPI data I/O pin acts as an input. SPISWAI — SPI Stop in Wait Mode 1 = SPI clocks stop when the MCU enters wait mode. 0 = SPI clocks continue to operate in wait mode. SPC0 — SPI Pin Control 0 The SPC0 bit chooses single-wire bidirectional mode. If MSTR = 0 (slave mode), the SPI uses the MISO (SISO) pin for bidirectional SPI data transfers. If MSTR = 1 (master mode), the SPI uses the MOSI (MOMI) pin for bidirectional SPI data transfers. When SPC0 = 1, BIDIROE is used to enable or disable the output driver for the single bidirectional SPI I/O pin. 1 = SPI configured for single-wire bidirectional operation. 0 = SPI uses separate pins for data input and data output. Bit 7 6 54321 Bit 0 Read: 0 0 0 MODFEN BIDIROE 0 SPISWAI SPC0 Write: Reset: 0 0 000000 = Unimplemented or Reserved |
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