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HCS08 bảng dữ liệu(PDF) 192 Page - Motorola, Inc |
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HCS08 bảng dữ liệu(HTML) 192 Page - Motorola, Inc |
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192 / 290 page ![]() Serial Peripheral Interface (SPI) Module MC9S08GB/GT 192 MOTOROLA 12.1 Features Features of the SPI module include: • Master or slave mode operation • Full-duplex or single-wire bidirectional option • Programmable transmit bit rate • Double-buffered transmit and receive • Serial clock phase and polarity options • Slave select output • Selectable MSB-first or LSB-first shifting 12.2 Block Diagrams This section includes block diagrams showing SPI system connections, the internal organization of the SPI module, and the SPI clock dividers that control the master mode bit rate. 12.2.1 SPI System Block Diagram Figure 12-2 shows the SPI modules of two MCUs connected in a master-slave arrangement. The master device initiates all SPI data transfers. During a transfer, the master shifts data out (on the MOSI pin) to the slave while simultaneously shifting data in (on the MISO pin) from the slave. The transfer effectively exchanges the data that was in the SPI shift registers of the two SPI systems. The SPSCK signal is a clock output from the master and an input to the slave. The slave device must be selected by a low level on the slave select input (SS pin). In this system, the master device has configured its SS pin as an optional slave select output. Figure 12-2 SPI System Connections 7 6 5 4 3 2 1 0 SPI SHIFTER CLOCK GENERATOR 7 6 5 4 3 2 1 0 SPI SHIFTER SS SPSCK MISO MOSI SS SPSCK MISO MOSI MASTER SLAVE |
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