HCS08 datasheet(188/290 Pages) MOTOROLA

188 / 290 page

Serial Communications Interface (SCI) Module

MC9S08GB/GT

188

MOTOROLA

RAF — Receiver Active Flag

RAF is set when the SCI receiver detects the beginning of a valid start bit, and RAF is cleared

automatically when the receiver detects an idle line. This status flag can be used to check whether an

SCI character is being received before instructing the MCU to go to stop mode.

1 = SCI receiver active (RxD input not idle).

0 = SCI receiver idle waiting for a start bit.

11.10.6 SCI x Control Register 3 (SCIxC3)

Figure 11-11 SCI x Control Register 3 (SCIxC3)

R8 — Ninth Data Bit for Receiver

When the SCI is configured for 9-bit data (M = 1), R8 can be thought of as a ninth receive data bit to

the left of the MSB of the buffered data in the SCIxD register. When reading 9-bit data, read R8 before

reading SCIxD because reading SCIxD completes automatic flag clearing sequences which could

allow R8 and SCIxD to be overwritten with new data.

T8 — Ninth Data Bit for Transmitter

When the SCI is configured for 9-bit data (M = 1), T8 may be thought of as a ninth transmit data bit

to the left of the MSB of the data in the SCIxD register. When writing 9-bit data, the entire 9-bit value

is transferred to the SCI shift register after SCIxD is written so T8 should be written (if it needs to

change from its previous value) before SCIxD is written. If T8 does not need to change in the new

value (such as when it is used to generate mark or space parity), it need not be written each time SCIxD

is written.

TXDIR — TxD Pin Direction in Single-Wire Mode

When the SCI is configured for single-wire half-duplex operation (LOOPS = RSRC = 1), this bit

determines the direction of data at the TxD pin.

1 = TxD pin is an output in single-wire mode.

0 = TxD pin is an input in single-wire mode.

ORIE — Overrun Interrupt Enable

This bit enables the overrun flag (OR) to generate hardware interrupt requests.

1 = Hardware interrupt requested when OR = 1.

0 = OR interrupts disabled (use polling).

Bit 7

654321

Bit 0

Read:

TXDIR

ORIE

NEIE

FEIE

PEIE

Write:

Reset:

00000000

= Unimplemented or Reserved

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