HCS08 datasheet(186/290 Pages) MOTOROLA

186 / 290 page

Serial Communications Interface (SCI) Module

MC9S08GB/GT

186

MOTOROLA

TDRE — Transmit Data Register Empty Flag

TDRE is set out of reset and when a transmit data value transfers from the transmit data buffer to the

transmit shifter, leaving room for a new character in the buffer. To clear TDRE, read SCIxS1 with

TDRE = 1 and then write to the SCI data register (SCIxD).

1 = Transmit data register (buffer) empty.

0 = Transmit data register (buffer) full.

TC — Transmission Complete Flag

TC is set out of reset and when TDRE = 1 and no data, preamble, or break character is being

transmitted.

1 = Transmitter idle (transmission activity complete).

0 = Transmitter active (sending data, a preamble, or a break).

TC is cleared automatically by reading SCIxS1 with TC = 1 and then doing one of the following three

things.

•

Write to the SCI data register (SCIxD) to transmit new data

•

Queue a preamble by changing TE from 0 to 1

•

Queue a break character by writing 1 to SBK in SCIxC2

RDRF — Receive Data Register Full Flag

RDRF becomes set when a character transfers from the receive shifter into the receive data register

(SCIxD). To clear RDRF, read SCIxS1 with RDRF = 1 and then read the SCI data register (SCIxD).

1 = Receive data register full.

0 = Receive data register empty.

IDLE — Idle Line Flag

IDLE is set when the SCI receive line becomes idle for a full character time after a period of activity.

When ILT = 0, the receiver starts counting idle bit times after the start bit. So if the receive character

is all 1s, these bit times and the stop bit time count toward the full character time of logic high (10 or

11 bit times depending on the M control bit) needed for the receiver to detect an idle line. When

ILT = 1, the receiver doesn’t start counting idle bit times until after the stop bit. So the stop bit and any

logic high bit times at the end of the previous character do not count toward the full character time of

logic high needed for the receiver to detect an idle line.

To clear IDLE, read SCIxS1 with IDLE = 1 and then read the SCI data register (SCIxD). After IDLE

has been cleared, it cannot become set again until after a new character has been received and RDRF

has been set. IDLE will get set only once even if the receive line remains idle for an extended period.

1 = Idle line was detected.

0 = No idle line detected.

HCS08 bảng dữ liệu(PDF) 186 Page - Motorola, Inc