HCS08 datasheet(134/290 Pages) MOTOROLA

134 / 290 page

Parallel Input/Output

MC9S08GB/GT

134

MOTOROLA

When the SPI module is enabled, PTE2 serves as the SPI module’s slave select pin (SS), PTE3 serves as

the master-in slave-out pin (MISO), PTE4 serves as the master-out slave-in pin (MOSI), and PTE5 serves

as the SPI clock pin (SPSCK). Refer to the Serial Peripheral Interface (SPI) Module section for more

information about using PTE5–PTE2 as SPI pins.

8.3.6 Port F and High-Current Drivers

Figure 8-7 Port F Pin Names

Port F is an 8-bit port general-purpose I/O that is not shared with any peripheral module. Port F has high

current output drivers.

Port F pins are available as general-purpose I/O pins controlled by the port F data (PTFD), data direction

(PTFDD), pullup enable (PTFPE), and slew rate control (PTFSE) registers. Refer to 8.4 Parallel I/O

Controls for more information about general-pupose I/O control.

8.3.7 Port G, BKGD/MS, and Oscillator

Figure 8-8 Port G Pin Names

Port G is an 8-bit port which is shared among the background/mode select function, oscillator, and

general-purpose I/O. When the background/mode select function or oscillator is enabled, the pin direction

will be controlled by the module function.

Port G pins are available as general-purpose I/O pins controlled by the port G data (PTGD), data direction

(PTGDD), pullup enable (PTGPE), and slew rate control (PTGSE) registers. Refer to 8.4 Parallel I/O

Controls for more information about general-pupose I/O control.

The internal pullup for PTG0 is enabled when the background/mode select function is enabled, regardless

of the state of PTGPE0. During reset, the BKGD/MS pin functions as a mode select pin. Once the MCU

is out of reset, the BKGD/MS pin becomes the background communications input/output pin. The PTG0

can be configured to be a general-purpose output pin. Refer to the Modes of Operation section, the

Resets, Interrupts, and System Configuration section, and the Development Support section for more

information about using this pin.

The ICG module can be configured to use PTG2–PTG1 ports as crystal oscillator or external clock pins.

Refer to the Internal Clock Generator (ICG) Module section for more information about using these

pins as oscillator pins.

Port F

Bit 7

654321

Bit 0

MCU Pin:

PTF7

PTF6

PTF5

PTF4

PTF3

PTF2

PTF1

PTF0

Port G

Bit 7

654321

Bit 0

MCU Pin:

PTG7

PTG6

PTG5

PTG4

PTG3

PTG2/

EXTAL

PTG1/

XTAL

PTG0/

BKGD/MS

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