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HCS08 bảng dữ liệu(PDF) 131 Page - Motorola, Inc |
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HCS08 bảng dữ liệu(HTML) 131 Page - Motorola, Inc |
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131 / 290 page ![]() Data Sheet — MC9S08GB60/D V1.5 MOTOROLA 131 MC9S08GB/GT 8.2 Features Parallel I/O features, depending on package choice, include: • A total of 56 general-purpose I/O pins in seven ports (one is output only) • High-current drivers on port C and port F pins • Hysteresis input buffers • Software-controlled pullups on each input pin • Software-controlled slew rate output buffers • Eight port A pins shared with KBI • Eight port B pins shared with ATD • Eight high-current port C pins shared with SCI2 and IIC • Eight port D pins shared with TPM1 and TPM2 • Eight port E pins shared with SCI1 and SPI • Eight high-current port F pins • Eight port G pins shared with EXTAL, XTAL, and BKGD/MS 8.3 Pin Descriptions The MC9S08GB/GT has a total of 56 parallel I/O pins (one is output only) in seven 8-bit ports (PTA–PTG). Not all pins are bonded out in all packages. Consult the pin assignment in the Pins and Connections section for available parallel I/O pins. All of these pins are available for general-purpose I/O when they are not used by other on-chip peripheral systems. After reset, BKGD/MS is enabled and therefore is not usable as an output pin until BKGDPE in SOPT is cleared. The rest of the peripheral functions are disabled. After reset, all data direction and pullup enable controls are set to 0s. These pins default to being high-impedance inputs with on-chip pullup devices disabled. The following paragraphs discuss each port and the software controls that determine each pin’s use. 8.3.1 Port A and Keyboard Interrupts Figure 8-2 Port A Pin Names Port A is an 8-bit port shared among the KBI keyboard interrupt inputs and general-purpose I/O. Any pins enabled as KBI inputs will be forced to act as inputs. Port A Bit 7 654321 Bit 0 MCU Pin: PTA7/ KBIP7 PTA6/ KBIP6 PTA5/ KBIP5 PTA4/ KBIP4 PTA3/ KBIP3 PTA2/ KBIP2 PTA1/ KBIP1 PTA0/ KBIP0 |
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