HCS08 datasheet(149/374 Pages) NXP

149 / 374 page

Analog-to-Digital Converter (S08ADC12V1)

MC9S08JM60 Series Data Sheet, Rev. 5

Freescale Semiconductor

149

configured for low power operation, long sample time, continuous conversion, and automatic compare of

the conversion result to a software determined compare value.

10.4.4.1

Initiating Conversions

A conversion is initiated:

•

Following a write to ADCSC1 (with ADCH bits not all 1s) if software triggered operation is

selected.

•

Following a hardware trigger (ADHWT) event if hardware triggered operation is selected.

•

Following the transfer of the result to the data registers when continuous conversion is enabled.

If continuous conversions are enabled, a new conversion is automatically initiated after the completion of

the current conversion. In software triggered operation, continuous conversions begin after ADCSC1 is

written and continue until aborted. In hardware triggered operation, continuous conversions begin after a

hardware trigger event and continue until aborted.

10.4.4.2

Completing Conversions

A conversion is completed when the result of the conversion is transferred into the data result registers,

ADCRH and ADCRL. This is indicated by the setting of COCO. An interrupt is generated if AIEN is high

at the time that COCO is set.

A blocking mechanism prevents a new result from overwriting previous data in ADCRH and ADCRL if

the previous data is in the process of being read while in 12-bit or 10-bit MODE (the ADCRH register has

been read but the ADCRL register has not). When blocking is active, the data transfer is blocked, COCO

is not set, and the new result is lost. In the case of single conversions with the compare function enabled

and the compare condition false, blocking has no effect and ADC operation is terminated. In all other cases

of operation, when a data transfer is blocked, another conversion is initiated regardless of the state of

ADCO (single or continuous conversions enabled).

If single conversions are enabled, the blocking mechanism could result in several discarded conversions

and excess power consumption. To avoid this issue, the data registers must not be read after initiating a

single conversion until the conversion completes.

10.4.4.3

Aborting Conversions

Any conversion in progress is aborted when:

•

A write to ADCSC1 occurs (the current conversion will be aborted and a new conversion will be

initiated, if ADCH are not all 1s).

•

A write to ADCSC2, ADCCFG, ADCCVH, or ADCCVL occurs. This indicates a mode of

operation change has occurred and the current conversion is therefore invalid.

•

The MCU is reset.

•

The MCU enters stop mode with ADACK not enabled.

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