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HCS08 bảng dữ liệu(PDF) 323 Page - NXP Semiconductors |
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HCS08 bảng dữ liệu(HTML) 323 Page - NXP Semiconductors |
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323 / 374 page ![]() Universal Serial Bus Device Controller (S08USBV1) MC9S08JM60 Series Data Sheet, Rev. 5 Freescale Semiconductor 323 • USB transceiver disabled • USBDP pullup disabled • Endpoints disabled • USB address register set to zero 17.4.8 Interrupts Interrupts from the INTSTAT register signify events which occur during normal operation — USB start of frame tokens (TOKSOF), packet completion (TOKDNE), USB bus reset (USBRST), endpoint errors (ERROR), suspend and resume (SLEEP and RESUME), and endpoint stalled (STALL). The ERRSTAT interrupts carry information about specific types of errors, which is needed on an application specific basis. Using ERRSTAT, an application can determine exactly why a packet transfer failed — due to CRC error, PID check error and so on. Both registers are maskable via the INTENB and ERRENB registers. The INTSTAT and ERRSTAT are used to signal interrupts in a two-level structure. Unmasked interrupts from the ERRSTAT register are reported in the INTSTAT register. Note that the interrupt registers work in concert with the STAT register. On receipt of an INTSTAT interrupt, software can check the STAT register and determine which BDT entry was affected by the transaction. |
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