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HCS08 bảng dữ liệu(PDF) 276 Page - NXP Semiconductors

tên linh kiện HCS08
Giải thích chi tiết về linh kiện  HCS08 Microcontrollers
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HCS08 bảng dữ liệu(HTML) 276 Page - NXP Semiconductors

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Timer/PWM Module (S08TPMV3)
MC9S08JM60 Series Data Sheet, Rev. 5
276
Freescale Semiconductor
When a channel is configured for edge-aligned PWM (CPWMS=0, MSnB=1 and ELSnB:ELSnA not =
0:0), the data direction is overridden, the TPMxCHn pin is forced to be an output controlled by the TPM,
and ELSnA controls the polarity of the PWM output signal on the pin. When ELSnB:ELSnA=1:0, the
TPMxCHn pin is forced high at the start of each new period (TPMxCNT=0x0000), and the pin is forced
low when the channel value register matches the timer counter. When ELSnA=1, the TPMxCHn pin is
forced low at the start of each new period (TPMxCNT=0x0000), and the pin is forced high when the
channel value register matches the timer counter.
Figure 16-3. High-True Pulse of an Edge-Aligned PWM
Figure 16-4. Low-True Pulse of an Edge-Aligned PWM
CHnF BIT
TOF BIT
0
...
1
2
34
5
6
780
1
2
...
TPMxMODH:TPMxMODL = 0x0008
TPMxCnVH:TPMxCnVL = 0x0005
TPMxCNTH:TPMxCNTL
TPMxCHn
CHnF BIT
TOF BIT
0
...
1
2
34
5
6
780
1
2
...
TPMxMODH:TPMxMODL = 0x0008
TPMxCnVH:TPMxCnVL = 0x0005
TPMxCNTH:TPMxCNTL
TPMxCHn



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