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HCS08 bảng dữ liệu(PDF) 149 Page - NXP Semiconductors

tên linh kiện HCS08
Giải thích chi tiết về linh kiện  Microcontrollers
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HCS08 bảng dữ liệu(HTML) 149 Page - NXP Semiconductors

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Internal Clock Source (S08ICSV2)
MC9S08SG8 MCU Series Data Sheet, Rev. 8
Freescale Semiconductor
149
10.1.2
Features
Key features of the ICS module follow. For device specific information, refer to the ICS Characteristics in
the Electricals section of the documentation.
•
Frequency-locked loop (FLL) is trimmable for accuracy
— 0.2% resolution using internal 32kHz reference
— 1.5% deviation over voltage and temperature using internal 32kHz reference
•
Internal or external reference clocks up to 5MHz can be used to control the FLL
— 3 bit select for reference divider is provided
•
Internal reference clock has 9 trim bits available
•
Internal or external reference clocks can be selected as the clock source for the MCU
•
Whichever clock is selected as the source can be divided down
— 2 bit select for clock divider is provided
– Allowable dividers are: 1, 2, 4, 8
– BDC clock is provided as a constant divide by 2 of the DCO output
•
Control signals for a low power oscillator as the external reference clock are provided
— HGO, RANGE, EREFS, ERCLKEN, EREFSTEN
•
FLL Engaged Internal mode is automatically selected out of reset
10.1.3
Block Diagram
Figure 10-2 is the ICS block diagram.



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