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HCS08 bảng dữ liệu(PDF) 31 Page - NXP Semiconductors

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HCS08 bảng dữ liệu(HTML) 31 Page - NXP Semiconductors

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Chapter 2 Pins and Connections
MC9S08SG8 MCU Series Data Sheet, Rev. 8
Freescale Semiconductor
31
Pin Number
Priority
20-pin
16-pin
8-pin
Port Pin
Alt 1
Alt 2
Alt 3
Alt 4
Alt5
11
1
RESET
2
2
2
BKGD
MS
33
3
VDD
44
4
VSS
55
—
PTB7
SCL1
1 IIC pins can be repositioned using IICPS in SOPT2, default reset locations are on PTA2 and PTA3.
EXTAL
66
—
PTB6
SDA1
XTAL
77
—
PTB5
TPM1CH12
2 TPM1CHx pins can be repositioned using TPM1PS in SOPT2, default reset locations are on PTA0 and
PTB5.
SS
PTC03
3 This port pin is part of the ganged output feature. When pin is enabled for ganged output, it will have priority
over all digital modules. The output data, drive strength and slew-rate control of this port pin will follow the
configuration for the PTC0 pin, even in 16-pin packages where PTC0 doesn’t bond out. Ganged output not
available in 8-pin packages.
8
8
—
PTB4
TPM2CH1
MISO
PTC03
9—
—
PTC3
PTC03
ADP11
10
—
—
PTC2
PTC03
ADP10
11
—
—
PTC1
TPM1CH12
PTC03
ADP9
12
—
—
PTC0
TPM1CH02
PTC03
ADP8
13
9
—
PTB3
PIB3
MOSI
PTC03
ADP7
14
10
—
PTB2
PIB2
SPSCK
PTC03
ADP6
15
11
—
PTB1
PIB1
TxD
ADP5
16
12
—
PTB0
PIB0
RxD
ADP4
17
13
5
PTA3
PIA3
SCL1
ADP3
18
14
6
PTA2
PIA2
SDA1
ADP2
ACMPO
19
15
7
PTA1
PIA1
TPM2CH0
ADP14
4 If ACMP and ADC are both enabled, both will have access to the pin.
ACMP–4
20
16
8
PTA0
PIA0
TPM1CH02
TCLK
ADP04
ACMP+4
Lowest
Highest
Table 2-1. Pin Availability by Package Pin-Count



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