HCS08 datasheet(74/316 Pages) NXP

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Chapter 5 Resets, Interrupts, and General System Control

MC9S08SG8 MCU Series Data Sheet, Rev. 8

Freescale Semiconductor

5.7.7

System Power Management Status and Control 2 Register

(SPMSC2)

This register is used to report the status of the low voltage warning function, and to configure the stop

mode behavior of the MCU.

Figure 5-9. System Power Management Status and Control 2 Register (SPMSC2)

210

LVDV1

1 This bit can be written only one time after power-on reset. Additional writes are ignored.

LVWV

PPDF

PPDC2

2 This bit can be written only one time after reset. Additional writes are ignored.

PPDACK

Power-on Reset:

000

LVD Reset:

000

Any other Reset:

= Unimplemented or Reserved

u = Unaffected by reset

Table 5-10. SPMSC2 Register Field Descriptions

Field

Description

LVDV

Low-Voltage Detect Voltage Select — This write-once bit selects the low voltage detect (LVD) trip point setting.

It also selects the warning voltage range. See Table 5-11.

LVWV

Low-Voltage Warning Voltage Select — This bit selects the low voltage warning (LVW) trip point voltage. See

Table 5-11.

PPDF

Partial Power Down Flag — This read-only status bit indicates that the MCU has recovered from stop2 mode.

0 MCU has not recovered from stop2 mode.

1 MCU recovered from stop2 mode.

PPDACK

Partial Power Down Acknowledge — Writing a 1 to PPDACK clears the PPDF bit

PPDC

Partial Power Down Control — This write-once bit controls whether stop2 or stop3 mode is selected.

0 Stop3 mode enabled.

1 Stop2, partial power down, mode enabled.

Table 5-11. LVD and LVW trip point typical values1

1 See Electrical Characteristics appendix for minimum and maximum values.

LVDV:LVWV

LVW Trip Point

LVD Trip Point

0:0

VLVW0 = 2.74 V

VLVD0 = 2.56 V

0:1

VLVW1 = 2.92 V

1:0

VLVW2 = 4.3 V

VLVD1 = 4.0 V

1:1

VLVW3 = 4.6 V

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