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Chapter 4 Memory

MC9S08SG8 MCU Series Data Sheet, Rev. 8

Freescale Semiconductor

4.3

The registers in the MC9S08SG8 are divided into these groups:

•

Direct-page registers are located in the first 128 locations in the memory map; these are accessible

with efficient direct addressing mode instructions.

•

High-page registers are used much less often, so they are located above 0x1800 in the memory

map. This leaves more room in the direct page for more frequently used registers and RAM.

•

The nonvolatile register area consists of a block of 16 locations in FLASH memory at

0xFFB0–0xFFBF. Nonvolatile register locations include:

— NVPROT and NVOPT are loaded into working registers at reset

— An 8-byte backdoor comparison key that optionally allows a user to gain controlled access to

secure memory

Because the nonvolatile register locations are FLASH memory, they must be erased and

programmed like other FLASH memory locations.

Direct-page registers can be accessed with efficient direct addressing mode instructions. Bit manipulation

instructions can be used to access any bit in any direct-page register. Table 4-2 is a summary of all

user-accessible direct-page registers and control bits.

The direct page registers in Table 4-2 can use the more efficient direct addressing mode, which requires

only the lower byte of the address. Because of this, the lower byte of the address in column one is shown

in bold text. In Table 4-3 and Table 4-4, the whole address in column one is shown in bold. In Table 4-2,

Table 4-3, and Table 4-4, the register names in column two are shown in bold to set them apart from the

bit names to the right. Cells that are not associated with named bits are shaded. A shaded cell with a 0

indicates this unused bit always reads as a 0. Shaded cells with dashes indicate unused or reserved bit

locations that could read as 1s or 0s.

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