HCS08 datasheet(3/316 Pages) NXP

3 / 316 page

8-Bit HCS08 Central Processor Unit (CPU)

• 40 MHz HCS08 CPU (central processor unit)

• 36 MHz HCS08 CPU for temperatures greater

than 125

C

• HC08 instruction set with added BGND instruction

• Support for up to 32 interrupt/reset sources

On-Chip Memory

• Flash read/program/erase over full operating

voltage and temperature

• Random-access memory (RAM)

Power-Saving Modes

• Two very low power stop modes

• Reduced power wait mode

• Very low power real time interrupt for use in run,

wait, and stop

Clock Source Options

• Oscillator (XOSC) — Loop-control Pierce

oscillator; Crystal or ceramic resonator range of

31.25 kHz to 38.4 kHz or 1 MHz to 16MHz

• Internal Clock Source (ICS) — Internal clock

source module containing a frequency-locked

loop (FLL) controlled by internal or external

reference; precision trimming of internal reference

allows 0.2% resolution and 1.5% deviation over

temperature –40 to 125

C or 3% deviation for

temperature > 125

C and voltage; supports bus

frequencies from 2 MHz to 20MHz.

System Protection

• Watchdog computer operating properly (COP)

reset with option to run from dedicated 1-kHz

internal clock source or bus clock

• Low-voltage detection with reset or interrupt;

selectable trip points

• Illegal opcode detection with reset

• Illegal address detection with reset

• FLASH block protect

Development Support

• Single-wire background debug interface

• Breakpoint capability to allow single breakpoint

setting during in-circuit debugging (plus two more

breakpoints in on-chip debug module)

• On-chip, in-circuit emulation (ICE) debug module

containing two comparators and nine trigger

modes. Eight deep FIFO for storing

change-of-flow address and event-only data.

Debug module supports both tag and force

breakpoints.

Peripherals

• ADC — 12-channel, 10-bit resolution, 2.5

s

conversion time, automatic compare function,

temperature sensor, internal bandgap reference

channel; runs in stop3

• ACMP — Analog comparator with selectable

interrupt on rising, falling, or either edge of

comparator output; compare option to fixed

internal bandgap reference voltage; output can be

optionally routed to TPM module; runs in stop3

• SCI — Full duplex non-return to zero (NRZ); LIN

master extended break generation; LIN slave

extended break detection; wake up on active edge

• SPI — Full-duplex or single-wire bidirectional;

Double-buffered transmit and receive; Master or

Slave mode; MSB-first or LSB-first shifting

• IIC — Up to 100 kbps with maximum bus loading;

Multi-master operation; Programmable slave

address; Interrupt driven byte-by-byte data

transfer; supports broadcast mode and 10-bit

addressing

• MTIM — 8-bit modulo counter with 8-bit prescaler

and overflow interrupt

• TPMx — Two 2-channel timer pwm modules

(TPM1, TPM2); Selectable input capture, output

compare, or buffered edge- or center-aligned

PWM on each channel

• RTC — (Real-time counter) 8-bit modulus counter

with binary or decimal based prescaler; External

clock source for precise time base, time-of-day,

calendar or task scheduling functions; Free

running on-chip low power oscillator (1 kHz) for

cyclic wake-up without external components, runs

in all MCU modes

Input/Output

• 16 general purpose I/O pins (GPIOs)

• 8 interrupt pins with selectable polarity

• Ganged output option for PTB[5:2] and PTC[3:0];

allows single write to change state of multiple pins

• Hysteresis and configurable pull up device on all

input pins; Configurable slew rate and drive

strength on all output pins.

Package Options

• 20-TSSOP (not available on high-temperature

rated devices)

•16-TSSOP

• 8-SOIC (not available on high-temperature rated

devices)

MC9S08SG8 Features

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